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([2a02:810d:15c0:828:29dd:ded4:3ccc:83db]) by smtp.gmail.com with ESMTPSA id bl8-20020a170906c24800b00949691d3183sm4738461ejb.36.2023.04.16.00.42.16 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sun, 16 Apr 2023 00:42:17 -0700 (PDT) Message-ID: Date: Sun, 16 Apr 2023 09:42:16 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH v1 0/3] gpio: Add gpio-delay support Content-Language: en-US To: Andy Shevchenko , Alexander Stein Cc: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, Marek Vasut , Laurent Pinchart References: <20230406093344.917259-1-alexander.stein@ew.tq-group.com> <3231223.aeNJFYEL58@steina-w> <4800953.GXAFRqVoOG@steina-w> From: Krzysztof Kozlowski In-Reply-To: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 15/04/2023 17:06, Andy Shevchenko wrote: > On Fri, Apr 14, 2023 at 9:37 AM Alexander Stein > wrote: >> Am Dienstag, 11. April 2023, 11:34:16 CEST schrieb Andy Shevchenko: >>> On Tue, Apr 11, 2023 at 10:19 AM Alexander Stein >>> wrote: > ... > >>> So, taking the above into consideration, why is it GPIO property to >>> begin with? This is PCB property of the certain platform design that >>> needs to be driven by a specific driver, correct? >> >> True this is induced by the PCB, but this property applies to the GPIO, >> neither the GPIO controller output, nor the GPIO consumer is aware of. >> So it has to be added in between. The original idea to add a property for the >> consumer driver is also rejected, because this kind of behavior is not limited >> to this specific driver. >> That's why the delay is inserted in between the GPIO output and GPIO consumer. >> >>> At the very least this is pin configuration (but external to the SoC), >>> so has to be a _separate_ pin control in my opinion. >> >> Sorry, I don't get what you mean by _separate_ pin control. > > As you mentioned above this can be applied theoretically to any pin of > the SoC, That pin may or may not be a GPIO or a pin that can be > switched to the GPIO mode. Hence this entire idea shouldn't be part of > the existing _in-SoC_ pin control driver if any. This is a purely > separate entity, but at the same time it adds a property to a pin, > hence pin control. > At the same time, it's not an SoC related one, it's a PCB. Hence _separate_. I don't think that anything here is related to pin control. Pin control is specific function of some device which allows different properties or different functions of a pin. This has nothing to do with different properties/configuration/functions, thus it is not pin control. The pin control maintainer also acked the patches. The choice was discussed before, so I am surprised why you jump late in discussions. Although different problem is calling it v1. This is not v1, but v3 or v4. Keep proper versioning. After v2 goes v3. RFC does not mean "v-2". Best regards, Krzysztof