From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: "Hawkins, Nick" <nick.hawkins@hpe.com>
Cc: "Verdun, Jean-Marie" <verdun@hpe.com>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"krzysztof.kozlowski+dt@linaro.org"
<krzysztof.kozlowski+dt@linaro.org>,
"linux@armlinux.org.uk" <linux@armlinux.org.uk>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>
Subject: Re: [PATCH v1 1/5] soc: hpe: add support for HPE GXP Programmable Register Driver
Date: Thu, 13 Oct 2022 08:27:05 -0400 [thread overview]
Message-ID: <a7e96623-0010-a7ae-fa3d-df1defcd51ca@linaro.org> (raw)
In-Reply-To: <DM4PR84MB19276978EB630CF08833E5A488229@DM4PR84MB1927.NAMPRD84.PROD.OUTLOOK.COM>
On 12/10/2022 16:25, Hawkins, Nick wrote:
> Greetings Krysztof,
>
> Thanks for the feedback! I have several questions below:
>
>>> +
>>> +static ssize_t server_id_show(struct device *dev, struct
>>> +device_attribute *attr, char *buf) {
>>> + struct gxp_plreg_drvdata *drvdata = dev_get_drvdata(dev);
>>> + int value_upper;
>>> + int value_lower;
>>> + ssize_t ret;
>>> + u32 trans_offset;
>>> + u32 trans_shift;
>>> +
>>> + /* read upper first */
>>> + address_translation(drvdata->server_id.upper[BYTE],
>>> + &trans_offset,
>>> + &trans_shift);
>>> + regmap_read(drvdata->plreg_map, trans_offset, &value_upper);
>>> + value_upper = value_upper >> trans_shift;
>>> + value_upper = value_upper & drvdata->server_id.upper[MASK];
>>> +
>>> + /* read lower last */
>>> + address_translation(drvdata->server_id.lower[BYTE],
>>> + &trans_offset,
>>> + &trans_shift);
>>> + regmap_read(drvdata->plreg_map, trans_offset, &value_lower);
>>> + value_lower = value_lower >> trans_shift;
>>> + value_lower = value_lower & drvdata->server_id.lower[MASK];
>>> +
>>> + ret = sprintf(buf, "0x%04x", value_upper | value_lower);
>>> +
>>> + return ret;
>>> +}
>>> +
>>> +static DEVICE_ATTR_RO(server_id);
>
>> Missing sysfs documentation.
>
> Can you point me at the proper location / documentation for documenting sysfs? Thanks!
Documentation/ABI/README
>
>>> + for (i = 0; i <= MASK; i++) {
>>> + if (of_property_read_u32_index(np, "grp5", i,
>>> + &drvdata->grp_intr_flags.grp5[i])) {
>>> + dev_err(&pdev->dev,
>>> + "grp5intsflags is missing its 'grp5' property index %d\n", i);
>>> + return -ENODEV;
>>> + }
>>> + }
>>> +
>>> + np = of_get_child_by_name(pdev->dev.of_node, "pwrbtn");
>>> + if (!np) {
>>> + dev_err(&pdev->dev, "%pOF is missing its 'pwrbtn' node\n", np);
>>> + return -ENODEV;
>>> + }
>>> +
>>> + for (i = 0; i <= VALUE; i++) {
>>> + if (of_property_read_u32_index(np, "latch", i,
>>> +&drvdata->pwrbtn.latch[i])) {
>
>> Undocumented properties. NAK.
>
> If each child node of hpe,gxp-plreg were documented with their respective properties would this be acceptable?
I would need to see the bindings.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-10-13 12:29 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-11 18:55 [PATCH v1 0/5] Add PLREG and SPI Driver GXP Support nick.hawkins
2022-10-11 18:55 ` [PATCH v1 1/5] soc: hpe: add support for HPE GXP Programmable Register Driver nick.hawkins
2022-10-11 20:05 ` Krzysztof Kozlowski
2022-10-12 20:25 ` Hawkins, Nick
2022-10-13 12:27 ` Krzysztof Kozlowski [this message]
2022-10-12 0:28 ` kernel test robot
2022-10-11 18:55 ` [PATCH v1 2/5] dt-bindings: soc: hpe: Add hpe,gxp-plreg nick.hawkins
2022-10-11 19:51 ` Krzysztof Kozlowski
2022-10-11 20:27 ` Rob Herring
2022-10-12 19:56 ` Hawkins, Nick
2022-10-22 15:52 ` Krzysztof Kozlowski
2022-10-25 0:03 ` Hawkins, Nick
2022-10-25 0:15 ` Krzysztof Kozlowski
2022-10-25 18:44 ` Hawkins, Nick
2022-10-25 18:55 ` Krzysztof Kozlowski
2022-10-25 19:26 ` Hawkins, Nick
2022-10-25 19:33 ` Krzysztof Kozlowski
[not found] ` <DM4PR84MB197662C12018090C312AF72DD6319@DM4PR84MB1976.NAMPRD84.PROD.OUTLOOK.COM>
2022-10-25 19:48 ` Krzysztof Kozlowski
2022-10-25 19:49 ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 3/5] ARM: dts: hpe: Add PLREG/SPI Support nick.hawkins
2022-10-11 19:53 ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 4/5] ARM: multi_v7_defconfig: Enable GXP SPI and PLREG Drivers nick.hawkins
2022-10-11 19:54 ` Krzysztof Kozlowski
2022-10-11 18:55 ` [PATCH v1 5/5] MAINTAINERS: Add HPE SOC Drivers nick.hawkins
2022-10-11 20:06 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=a7e96623-0010-a7ae-fa3d-df1defcd51ca@linaro.org \
--to=krzysztof.kozlowski@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux@armlinux.org.uk \
--cc=nick.hawkins@hpe.com \
--cc=robh+dt@kernel.org \
--cc=verdun@hpe.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).