From: Adrian Hunter <adrian.hunter@intel.com>
To: Sowjanya Komatineni <skomatineni@nvidia.com>,
ulf.hansson@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com,
riteshh@codeaurora.org
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com, anrao@nvidia.com,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-mmc@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH V4 02/10] mmc: sdhci: allow host to specify maximum tuning loops
Date: Mon, 25 Mar 2019 12:25:38 +0200 [thread overview]
Message-ID: <a8372001-b4e9-3003-1213-2f652984e701@intel.com> (raw)
In-Reply-To: <1553402727-23130-2-git-send-email-skomatineni@nvidia.com>
On 24/03/19 6:45 AM, Sowjanya Komatineni wrote:
> As per the Host Controller Standard Specification Version 4.20,
> limitation of tuning iteration count is removed as PLL locking
> time can be longer than UHS-1 tuning due to larger PVT fluctuation
> and it will result in increase of tuning iteration to complete the
> tuning.
>
> This patch creates sdhci_host member tuning_loop_count to allow
> hosts to specify maximum tuning iterations and also updates
> execute_tuning to use this specified maximum tuning iteration count.
>
> Default tuning_loop_count is set to same as existing loop count of
> MAX_TUNING_LOOP which is 40 iterations.
>
> Tested-by: Jon Hunter <jonathanh@nvidia.com>
> Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
> ---
> drivers/mmc/host/sdhci.c | 5 +++--
> drivers/mmc/host/sdhci.h | 1 +
> 2 files changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> index a8141ff9be03..bbc0e0bb7128 100644
> --- a/drivers/mmc/host/sdhci.c
> +++ b/drivers/mmc/host/sdhci.c
> @@ -2369,9 +2369,9 @@ static int __sdhci_execute_tuning(struct sdhci_host *host, u32 opcode)
>
> /*
> * Issue opcode repeatedly till Execute Tuning is set to 0 or the number
> - * of loops reaches 40 times.
> + * of loops reaches tuning loop count.
> */
> - for (i = 0; i < MAX_TUNING_LOOP; i++) {
> + for (i = 0; i < host->tuning_loop_count; i++) {
> u16 ctrl;
>
> sdhci_send_tuning(host, opcode);
> @@ -3494,6 +3494,7 @@ struct sdhci_host *sdhci_alloc_host(struct device *dev,
> host->cqe_err_ier = SDHCI_CQE_INT_ERR_MASK;
>
> host->tuning_delay = -1;
> + host->tuning_loop_count = MAX_TUNING_LOOP;
>
> host->sdma_boundary = SDHCI_DEFAULT_BOUNDARY_ARG;
>
> diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> index 01002cba1359..57bb3e3dca89 100644
> --- a/drivers/mmc/host/sdhci.h
> +++ b/drivers/mmc/host/sdhci.h
> @@ -596,6 +596,7 @@ struct sdhci_host {
> #define SDHCI_TUNING_MODE_3 2
> /* Delay (ms) between tuning commands */
> int tuning_delay;
> + int tuning_loop_count;
>
> /* Host SDMA buffer boundary. */
> u32 sdma_boundary;
>
next prev parent reply other threads:[~2019-03-25 10:25 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-24 4:45 [PATCH V4 01/10] mmc: tegra: fix ddr signaling for non-ddr modes Sowjanya Komatineni
2019-03-24 4:45 ` [PATCH V4 02/10] mmc: sdhci: allow host to specify maximum tuning loops Sowjanya Komatineni
2019-03-25 10:25 ` Adrian Hunter [this message]
2019-03-24 4:45 ` [PATCH V4 03/10] mmc: tegra: update hw tuning process Sowjanya Komatineni
2019-03-25 10:38 ` Adrian Hunter
2019-03-24 4:45 ` [PATCH V4 04/10] dt-bindings: mmc: tegra: document Tegra194 compatible string Sowjanya Komatineni
2019-03-24 4:45 ` [PATCH V4 05/10] arm64: tegra: fix default tap and trim values Sowjanya Komatineni
2019-03-24 4:45 ` [PATCH V4 06/10] mmc: cqhci: allow hosts to update dcmd cmd desc Sowjanya Komatineni
2019-03-25 10:39 ` Adrian Hunter
2019-03-24 4:45 ` [PATCH V4 07/10] mmc: tegra: add Tegra186 WAR for CQE Sowjanya Komatineni
2019-03-25 10:41 ` Adrian Hunter
2019-03-24 4:45 ` [PATCH V4 08/10] mmc: cqhci: add CQHCI_SSC1 register CBC field mask Sowjanya Komatineni
2019-03-24 4:45 ` [PATCH V4 09/10] mmc: tegra: fix CQE enable and resume sequence Sowjanya Komatineni
2019-03-24 4:45 ` [PATCH V4 10/10] arm64: tegra: enable command queue for tegra186 sdmmc4 Sowjanya Komatineni
2019-03-25 13:27 ` [PATCH V4 01/10] mmc: tegra: fix ddr signaling for non-ddr modes Ulf Hansson
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