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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id gv7-20020a1709072bc700b006f3ef214dbbsm4600703ejc.33.2022.05.03.05.42.06 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 03 May 2022 05:42:07 -0700 (PDT) Message-ID: Date: Tue, 3 May 2022 14:42:06 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.7.0 Subject: Re: [PATCH 3/4] dt-bindings: mux: Add lan966 flexcom mux controller Content-Language: en-US To: Kavyasree Kotagiri , krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com, alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com, peda@axentia.se Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, lee.jones@linaro.org, linux@armlinux.org.uk, Manohar.Puri@microchip.com, UNGLinuxDriver@microchip.com References: <20220503105528.12824-1-kavyasree.kotagiri@microchip.com> <20220503105528.12824-4-kavyasree.kotagiri@microchip.com> From: Krzysztof Kozlowski In-Reply-To: <20220503105528.12824-4-kavyasree.kotagiri@microchip.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org On 03/05/2022 12:55, Kavyasree Kotagiri wrote: > This adds DT bindings documentation for lan966 flexcom > mux controller. > > Signed-off-by: Kavyasree Kotagiri > --- > .../mux/microchip,lan966-flx-mux.yaml | 55 +++++++++++++++++++ > 1 file changed, 55 insertions(+) > create mode 100644 Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml > > diff --git a/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml b/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml > new file mode 100644 > index 000000000000..8b20f531781a > --- /dev/null > +++ b/Documentation/devicetree/bindings/mux/microchip,lan966-flx-mux.yaml > @@ -0,0 +1,55 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/mux/microchip,lan966-flx-mux.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: microchip Lan966 Flexcom multiplexer bindings > + > +maintainers: > + - Kavyasree Kotagiri > + > +description: |+ > + The Microchip Lan966 have 5 Flexcoms. Each flexcom has 2 chip-selects > + when operating in USART and SPI modes. > + Each chip select of each flexcom can be mapped to 21 flexcom shared pins. > + Define register offset and pin number to map a flexcom chip-select > + to flexcom shared pin. > + > +properties: Usually you need allOf referencing mux-controller. > + compatible: > + enum: > + - microchip,lan966-flx-mux > + > + reg: > + maxItems: 1 > + > + '#mux-control-cells': > + const: 1 > + > + mux-offset-pin: > + description: an array of register offset and flexcom shared pin(0-20). > + > +required: > + - compatible > + - '#mux-control-cells' > + - mux-offset-pin and reg? > + > +additionalProperties: false > + > +examples: > + - | > + mux: mux-controller@e2004168 { > + compatible = "microchip,lan966-flx-mux"; > + reg = <0xe2004168 0x8>; > + #mux-control-cells = <1>; > + mux-offset-pin = > + <0x18 9>; /* 0: flx3 cs0 offset, pin-9 */ You could put it in one line, I think. > + }; > + > + flx3 { > + atmel,flexcom-mode = <2>; > + mux-controls = <&mux 0>; > + mux-control-names = "cs0"; > + }; No need for example for typical consumers. They are obvious and already documented. > +... Best regards, Krzysztof