From: "Ilpo Järvinen" <ilpo.jarvinen@linux.intel.com>
To: Sergiu Moga <sergiu.moga@microchip.com>
Cc: lee@kernel.org, robh+dt@kernel.org,
krzysztof.kozlowski+dt@linaro.org, nicolas.ferre@microchip.com,
alexandre.belloni@bootlin.com, claudiu.beznea@microchip.com,
radu_nicolae.pirea@upb.ro, richard.genoud@gmail.com,
Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Jiri Slaby <jirislaby@kernel.org>,
kavyasree.kotagiri@microchip.com, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
LKML <linux-kernel@vger.kernel.org>,
linux-spi@vger.kernel.org,
linux-serial <linux-serial@vger.kernel.org>
Subject: Re: [PATCH v5 9/9] tty: serial: atmel: Use FIELD_PREP/FIELD_GET
Date: Thu, 22 Sep 2022 15:12:35 +0300 (EEST) [thread overview]
Message-ID: <a894518-4112-b99a-c2b7-657c23ee4974@linux.intel.com> (raw)
In-Reply-To: <20220922113347.144383-10-sergiu.moga@microchip.com>
[-- Attachment #1: Type: text/plain, Size: 2775 bytes --]
On Thu, 22 Sep 2022, Sergiu Moga wrote:
> Convert all open-coded instances of bitfields retrieval/setting
> to FIELD_PREP/FIELD_GET where possible.
>
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
With one caveat below which I leave up to you to decide as it might be
more a matter of taste thing.
> @@ -82,7 +84,7 @@
> #define ATMEL_US_INACK BIT(20) /* Inhibit Non Acknowledge */
> #define ATMEL_US_DSNACK BIT(21) /* Disable Successive NACK */
> #define ATMEL_US_MAX_ITER_MASK GENMASK(26, 24) /* Max Iterations */
> -#define ATMEL_US_MAX_ITER(n) (((n) << 24) & ATMEL_US_MAX_ITER_MASK)
> +#define ATMEL_US_MAX_ITER(n) FIELD_PREP(ATMEL_US_MAX_ITER_MASK, (n))
> #define ATMEL_US_FILTER BIT(28) /* Infrared Receive Line Filter */
>
> #define ATMEL_US_IER 0x08 /* Interrupt Enable Register */
> @@ -134,19 +136,19 @@
>
> #define ATMEL_US_CMPR 0x90 /* Comparaison Register */
> #define ATMEL_US_FMR 0xa0 /* FIFO Mode Register */
> -#define ATMEL_US_TXRDYM(data) (((data) & 0x3) << 0) /* TX Ready Mode */
> -#define ATMEL_US_RXRDYM(data) (((data) & 0x3) << 4) /* RX Ready Mode */
> +#define ATMEL_US_TXRDYM(data) FIELD_PREP(GENMASK(1, 0), (data)) /* TX Ready Mode */
> +#define ATMEL_US_RXRDYM(data) FIELD_PREP(GENMASK(5, 4), (data)) /* RX Ready Mode */
> #define ATMEL_US_ONE_DATA 0x0
> #define ATMEL_US_TWO_DATA 0x1
> #define ATMEL_US_FOUR_DATA 0x2
> #define ATMEL_US_FRTSC BIT(7) /* FIFO RTS pin Control */
> -#define ATMEL_US_TXFTHRES(thr) (((thr) & 0x3f) << 8) /* TX FIFO Threshold */
> -#define ATMEL_US_RXFTHRES(thr) (((thr) & 0x3f) << 16) /* RX FIFO Threshold */
> -#define ATMEL_US_RXFTHRES2(thr) (((thr) & 0x3f) << 24) /* RX FIFO Threshold2 */
> +#define ATMEL_US_TXFTHRES(thr) FIELD_PREP(GENMASK(13, 8), (thr)) /* TX FIFO Threshold */
> +#define ATMEL_US_RXFTHRES(thr) FIELD_PREP(GENMASK(21, 16), (thr)) /* RX FIFO Threshold */
> +#define ATMEL_US_RXFTHRES2(thr) FIELD_PREP(GENMASK(29, 24), (thr)) /* RX FIFO Threshold2 */
>
> #define ATMEL_US_FLR 0xa4 /* FIFO Level Register */
> -#define ATMEL_US_TXFL(reg) (((reg) >> 0) & 0x3f) /* TX FIFO Level */
> -#define ATMEL_US_RXFL(reg) (((reg) >> 16) & 0x3f) /* RX FIFO Level */
> +#define ATMEL_US_TXFL(reg) FIELD_GET(GENMASK(5, 0), (reg)) /* TX FIFO Level */
> +#define ATMEL_US_RXFL(reg) FIELD_GET(GENMASK(21, 16), (reg)) /* RX FIFO Level */
I don't particularly like this kind of constructs. IMHO, all these would
be nice after removing the macro argument and moving the FIELD_PREP() to
.c file. That is,
.h:
#define ATMEL_US_RXFL GENMASK(21, 16)
.c:
... FIELD_PREP(ATMEL_US_RXFL, arg) ...
But I guess there might be differing opinions on it (and both are
correct from purely technical perspective).
--
i.
next prev parent reply other threads:[~2022-09-22 12:12 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-09-22 11:33 [PATCH v5 0/9] Make atmel serial driver aware of GCLK Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 1/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-09-28 15:03 ` Lee Jones
2022-09-28 15:07 ` Sergiu.Moga
2022-09-28 15:23 ` Lee Jones
2022-09-28 15:35 ` Sergiu.Moga
2022-10-24 12:25 ` Lee Jones
2022-09-22 11:33 ` [PATCH v5 2/9] dt-bindings: serial: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 3/9] dt-bindings: serial: atmel,at91-usart: Add SAM9260 compatibles to SAM9X60 Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 4/9] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 5/9] dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock Sergiu Moga
2022-09-22 11:33 ` [PATCH v5 6/9] tty: serial: atmel: Separate mode clearing between UART and USART Sergiu Moga
2022-09-30 7:22 ` Claudiu.Beznea
2022-09-22 11:33 ` [PATCH v5 7/9] tty: serial: atmel: Only divide Clock Divisor if the IP is USART Sergiu Moga
2022-09-30 7:22 ` Claudiu.Beznea
2022-09-22 11:33 ` [PATCH v5 8/9] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-09-30 7:23 ` Claudiu.Beznea
2022-09-22 11:33 ` [PATCH v5 9/9] tty: serial: atmel: Use FIELD_PREP/FIELD_GET Sergiu Moga
2022-09-22 12:12 ` Ilpo Järvinen [this message]
2022-09-30 7:23 ` Claudiu.Beznea
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