[PATCHv3 1/4] tty: serial: uartlite: Add structure for private data

[PATCHv3 1/4] tty: serial: uartlite: Add structure for private data

[shubhrajyoti.datta]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Add struct uartlite_data, to store the private data of the Uartlite
driver.

Signed-off-by: Tanvi Desai <tanvi.desai@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
 drivers/tty/serial/uartlite.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)

diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index c47db78..0f798f7 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -54,6 +54,10 @@
 #define ULITE_CONTROL_RST_RX	0x02
 #define ULITE_CONTROL_IE	0x10
 
+struct uartlite_data {
+	const struct uartlite_reg_ops *reg_ops;
+};
+
 struct uartlite_reg_ops {
 	u32 (*in)(void __iomem *addr);
 	void (*out)(u32 val, void __iomem *addr);
@@ -91,16 +95,16 @@ static const struct uartlite_reg_ops uartlite_le = {
 
 static inline u32 uart_in32(u32 offset, struct uart_port *port)
 {
-	const struct uartlite_reg_ops *reg_ops = port->private_data;
+	struct uartlite_data *pdata = port->private_data;
 
-	return reg_ops->in(port->membase + offset);
+	return pdata->reg_ops->in(port->membase + offset);
 }
 
 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 {
-	const struct uartlite_reg_ops *reg_ops = port->private_data;
+	struct uartlite_data *pdata = port->private_data;
 
-	reg_ops->out(val, port->membase + offset);
+	pdata->reg_ops->out(val, port->membase + offset);
 }
 
 static struct uart_port ulite_ports[ULITE_NR_UARTS];
@@ -325,6 +329,7 @@ static void ulite_release_port(struct uart_port *port)
 
 static int ulite_request_port(struct uart_port *port)
 {
+	struct uartlite_data *pdata = port->private_data;
 	int ret;
 
 	pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
@@ -342,13 +347,13 @@ static int ulite_request_port(struct uart_port *port)
 		return -EBUSY;
 	}
 
-	port->private_data = (void *)&uartlite_be;
+	pdata->reg_ops = &uartlite_be;
 	ret = uart_in32(ULITE_CONTROL, port);
 	uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
 	ret = uart_in32(ULITE_STATUS, port);
 	/* Endianess detection */
 	if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
-		port->private_data = (void *)&uartlite_le;
+		pdata->reg_ops = &uartlite_le;
 
 	return 0;
 }
@@ -585,10 +590,12 @@ static struct uart_driver ulite_uart_driver = {
  * @id: requested id number.  Pass -1 for automatic port assignment
  * @base: base address of uartlite registers
  * @irq: irq number for uartlite
+ * @pdata: private data for uartlite
  *
  * Returns: 0 on success, <0 otherwise
  */
-static int ulite_assign(struct device *dev, int id, u32 base, int irq)
+static int ulite_assign(struct device *dev, int id, u32 base, int irq,
+			struct uartlite_data *pdata)
 {
 	struct uart_port *port;
 	int rc;
@@ -625,6 +632,7 @@ static int ulite_assign(struct device *dev, int id, u32 base, int irq)
 	port->dev = dev;
 	port->type = PORT_UNKNOWN;
 	port->line = id;
+	port->private_data = pdata;
 
 	dev_set_drvdata(dev, port);
 
@@ -675,6 +683,7 @@ MODULE_DEVICE_TABLE(of, ulite_of_match);
 static int ulite_probe(struct platform_device *pdev)
 {
 	struct resource *res;
+	struct uartlite_data *pdata;
 	int irq;
 	int id = pdev->id;
 #ifdef CONFIG_OF
@@ -684,6 +693,10 @@ static int ulite_probe(struct platform_device *pdev)
 	if (prop)
 		id = be32_to_cpup(prop);
 #endif
+	pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
+			     GFP_KERNEL);
+	if (!pdata)
+		return -ENOMEM;
 
 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	if (!res)
@@ -693,7 +706,7 @@ static int ulite_probe(struct platform_device *pdev)
 	if (irq <= 0)
 		return -ENXIO;
 
-	return ulite_assign(&pdev->dev, id, res->start, irq);
+	return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
 }
 
 static int ulite_remove(struct platform_device *pdev)
-- 
2.7.4

[PATCHv3 2/4] tty: serial: uartlite: Add clock adaptation

[shubhrajyoti.datta]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Add support of Common Clock Framework for Uartlite driver.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
v2:
removed the suspend resume changes to separate driver

 drivers/tty/serial/uartlite.c | 49 +++++++++++++++++++++++++++++++++++++++++--
 1 file changed, 47 insertions(+), 2 deletions(-)

diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index 0f798f7..b3a12be 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -21,6 +21,7 @@
 #include <linux/of_address.h>
 #include <linux/of_device.h>
 #include <linux/of_platform.h>
+#include <linux/clk.h>
 
 #define ULITE_NAME		"ttyUL"
 #define ULITE_MAJOR		204
@@ -56,6 +57,7 @@
 
 struct uartlite_data {
 	const struct uartlite_reg_ops *reg_ops;
+	struct clk *clk;
 };
 
 struct uartlite_reg_ops {
@@ -261,8 +263,15 @@ static void ulite_break_ctl(struct uart_port *port, int ctl)
 
 static int ulite_startup(struct uart_port *port)
 {
+	struct uartlite_data *pdata = port->private_data;
 	int ret;
 
+	ret = clk_enable(pdata->clk);
+	if (ret) {
+		dev_err(port->dev, "Failed to enable clock\n");
+		return ret;
+	}
+
 	ret = request_irq(port->irq, ulite_isr, IRQF_SHARED | IRQF_TRIGGER_RISING,
 			  "uartlite", port);
 	if (ret)
@@ -277,9 +286,12 @@ static int ulite_startup(struct uart_port *port)
 
 static void ulite_shutdown(struct uart_port *port)
 {
+	struct uartlite_data *pdata = port->private_data;
+
 	uart_out32(0, ULITE_CONTROL, port);
 	uart_in32(ULITE_CONTROL, port); /* dummy */
 	free_irq(port->irq, port);
+	clk_disable(pdata->clk);
 }
 
 static void ulite_set_termios(struct uart_port *port, struct ktermios *termios,
@@ -370,6 +382,17 @@ static int ulite_verify_port(struct uart_port *port, struct serial_struct *ser)
 	return -EINVAL;
 }
 
+static void ulite_pm(struct uart_port *port, unsigned int state,
+		     unsigned int oldstate)
+{
+	struct uartlite_data *pdata = port->private_data;
+
+	if (!state)
+		clk_enable(pdata->clk);
+	else
+		clk_disable(pdata->clk);
+}
+
 #ifdef CONFIG_CONSOLE_POLL
 static int ulite_get_poll_char(struct uart_port *port)
 {
@@ -405,6 +428,7 @@ static const struct uart_ops ulite_ops = {
 	.request_port	= ulite_request_port,
 	.config_port	= ulite_config_port,
 	.verify_port	= ulite_verify_port,
+	.pm		= ulite_pm,
 #ifdef CONFIG_CONSOLE_POLL
 	.poll_get_char	= ulite_get_poll_char,
 	.poll_put_char	= ulite_put_poll_char,
@@ -669,7 +693,6 @@ static int ulite_release(struct device *dev)
 /* ---------------------------------------------------------------------
  * Platform bus binding
  */
-
 #if defined(CONFIG_OF)
 /* Match table for of_platform binding */
 static const struct of_device_id ulite_of_match[] = {
@@ -684,7 +707,7 @@ static int ulite_probe(struct platform_device *pdev)
 {
 	struct resource *res;
 	struct uartlite_data *pdata;
-	int irq;
+	int irq, ret;
 	int id = pdev->id;
 #ifdef CONFIG_OF
 	const __be32 *prop;
@@ -706,11 +729,33 @@ static int ulite_probe(struct platform_device *pdev)
 	if (irq <= 0)
 		return -ENXIO;
 
+	pdata->clk = devm_clk_get(&pdev->dev, "s_axi_aclk");
+	if (IS_ERR(pdata->clk)) {
+		if (PTR_ERR(pdata->clk) != -ENOENT)
+			return PTR_ERR(pdata->clk);
+
+		/*
+		 * Clock framework support is optional, continue on
+		 * anyways if we don't find a matching clock.
+		 */
+		pdata->clk = NULL;
+	}
+
+	ret = clk_prepare(pdata->clk);
+	if (ret) {
+		dev_err(&pdev->dev, "Failed to prepare clock\n");
+		return ret;
+	}
+
 	return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
 }
 
 static int ulite_remove(struct platform_device *pdev)
 {
+	struct uart_port *port = dev_get_drvdata(&pdev->dev);
+	struct uartlite_data *pdata = port->private_data;
+
+	clk_disable_unprepare(pdata->clk);
 	return ulite_release(&pdev->dev);
 }
 
-- 
2.7.4

[PATCHv3 3/4] tty: serial: uartlite: Add support for suspend and resume

[shubhrajyoti.datta]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Add suspend and resume handlers for uartlite

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
v2:
patch added

 drivers/tty/serial/uartlite.c | 36 ++++++++++++++++++++++++++++++++++++
 1 file changed, 36 insertions(+)

diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index b3a12be..98d3ead 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -690,9 +690,44 @@ static int ulite_release(struct device *dev)
 	return rc;
 }
 
+/**
+ * ulite_suspend - Stop the device.
+ *
+ * @dev: handle to the device structure.
+ * Return: 0 always.
+ */
+static int __maybe_unused ulite_suspend(struct device *dev)
+{
+	struct uart_port *port = dev_get_drvdata(dev);
+
+	if (port)
+		uart_suspend_port(&ulite_uart_driver, port);
+
+	return 0;
+}
+
+/**
+ * ulite_resume - Resume the device.
+ *
+ * @dev: handle to the device structure.
+ * Return: 0 on success, errno otherwise.
+ */
+static int __maybe_unused ulite_resume(struct device *dev)
+{
+	struct uart_port *port = dev_get_drvdata(dev);
+
+	if (port)
+		uart_resume_port(&ulite_uart_driver, port);
+
+	return 0;
+}
+
 /* ---------------------------------------------------------------------
  * Platform bus binding
  */
+
+static SIMPLE_DEV_PM_OPS(ulite_pm_ops, ulite_suspend, ulite_resume);
+
 #if defined(CONFIG_OF)
 /* Match table for of_platform binding */
 static const struct of_device_id ulite_of_match[] = {
@@ -768,6 +803,7 @@ static struct platform_driver ulite_platform_driver = {
 	.driver = {
 		.name  = "uartlite",
 		.of_match_table = of_match_ptr(ulite_of_match),
+		.pm = &ulite_pm_ops,
 	},
 };
 
-- 
2.7.4

[PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite

[shubhrajyoti.datta]

From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>

Add binding doc for uartlite

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
v2:
lowercase for hex values
interrupt description updated
v3:
squashed the clock changes

 .../bindings/serial/xlnx,opb-uartlite.txt          | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt

diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
new file mode 100644
index 0000000..52719b9
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
@@ -0,0 +1,23 @@
+Xilinx Axi Uartlite controller Device Tree Bindings
+---------------------------------------------------------
+
+Required properties:
+- compatible		: Can be either of
+				"xlnx,xps-uartlite-1.00.a"
+				"xlnx,opb-uartlite-1.00.b"
+- reg			: Physical base address and size of the Axi Uartlite
+			  registers map.
+- interrupts		: Should contain UART controller interrupts.
+
+Optional properties:
+- port-number		: Set Uart port number
+- clock-names		: Should be "s_axi_aclk"
+- clocks		: Input clock specifier. Refer to common clock bindings.
+
+Example:
+serial@800c0000 {
+	compatible = "xlnx,xps-uartlite-1.00.a";
+	reg = <0x0 0x800c0000 0x10000>;
+	interrupts = <0x0 0x6e 0x1>;
+	port-number = <0>;
+};
-- 
2.7.4

Re: [PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite

[Rob Herring]

On Mon, Jul 16, 2018 at 10:53:54AM +0530, shubhrajyoti.datta@gmail.com wrote:
> From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> 
> Add binding doc for uartlite

A note that this binding is already in use and was undocumented would be 
nice.

> 
> Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> ---
> v2:
> lowercase for hex values
> interrupt description updated
> v3:
> squashed the clock changes
> 
>  .../bindings/serial/xlnx,opb-uartlite.txt          | 23 ++++++++++++++++++++++
>  1 file changed, 23 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> 
> diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> new file mode 100644
> index 0000000..52719b9
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> @@ -0,0 +1,23 @@
> +Xilinx Axi Uartlite controller Device Tree Bindings
> +---------------------------------------------------------
> +
> +Required properties:
> +- compatible		: Can be either of
> +				"xlnx,xps-uartlite-1.00.a"
> +				"xlnx,opb-uartlite-1.00.b"
> +- reg			: Physical base address and size of the Axi Uartlite
> +			  registers map.
> +- interrupts		: Should contain UART controller interrupts.

How many?

> +
> +Optional properties:
> +- port-number		: Set Uart port number
> +- clock-names		: Should be "s_axi_aclk"
> +- clocks		: Input clock specifier. Refer to common clock bindings.

How do you calc baud rates if this is omitted?

> +
> +Example:
> +serial@800c0000 {
> +	compatible = "xlnx,xps-uartlite-1.00.a";
> +	reg = <0x0 0x800c0000 0x10000>;
> +	interrupts = <0x0 0x6e 0x1>;
> +	port-number = <0>;
> +};
> -- 
> 2.7.4
> 
> --
> To unsubscribe from this list: send the line "unsubscribe devicetree" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at  http://vger.kernel.org/majordomo-info.html

RE: [PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite

[Shubhrajyoti Datta]

HI Rob,
Thanks for the review.

> -----Original Message-----
> From: Rob Herring [mailto:robh@kernel.org]
> Sent: Monday, July 16, 2018 9:33 PM
> To: shubhrajyoti.datta@gmail.com
> Cc: linux-serial@vger.kernel.org; devicetree@vger.kernel.org;
> gregkh@linuxfoundation.org; jacmet@sunsite.dk; Shubhrajyoti Datta
> <shubhraj@xilinx.com>
> Subject: Re: [PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite
> 
> On Mon, Jul 16, 2018 at 10:53:54AM +0530, shubhrajyoti.datta@gmail.com
> wrote:
> > From: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> >
> > Add binding doc for uartlite
> 
> A note that this binding is already in use and was undocumented would be
> nice.
Done in next version.
> 
> >
> > Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
> > ---
> > v2:
> > lowercase for hex values
> > interrupt description updated
> > v3:
> > squashed the clock changes
> >
> >  .../bindings/serial/xlnx,opb-uartlite.txt          | 23 ++++++++++++++++++++++
> >  1 file changed, 23 insertions(+)
> >  create mode 100644
> > Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> >
> > diff --git
> > a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> > b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> > new file mode 100644
> > index 0000000..52719b9
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
> > @@ -0,0 +1,23 @@
> > +Xilinx Axi Uartlite controller Device Tree Bindings
> > +---------------------------------------------------------
> > +
> > +Required properties:
> > +- compatible		: Can be either of
> > +				"xlnx,xps-uartlite-1.00.a"
> > +				"xlnx,opb-uartlite-1.00.b"
> > +- reg			: Physical base address and size of the Axi Uartlite
> > +			  registers map.
> > +- interrupts		: Should contain UART controller interrupts.
> 
> How many?
There is just one interrupt.Fixed in  next version.
> 
> > +
> > +Optional properties:
> > +- port-number		: Set Uart port number
> > +- clock-names		: Should be "s_axi_aclk"
> > +- clocks		: Input clock specifier. Refer to common clock
> bindings.
> 
> How do you calc baud rates if this is omitted?
This is a PL (programmable logic ) ip the baud cannot be changed runtime it is decided at  design.
> 
> > +
> > +Example:
> > +serial@800c0000 {
> > +	compatible = "xlnx,xps-uartlite-1.00.a";
> > +	reg = <0x0 0x800c0000 0x10000>;
> > +	interrupts = <0x0 0x6e 0x1>;
> > +	port-number = <0>;
> > +};
> > --
> > 2.7.4
> >
> > --
> > To unsubscribe from this list: send the line "unsubscribe devicetree"
> > in the body of a message to majordomo@vger.kernel.org More majordomo
> > info at  http://vger.kernel.org/majordomo-info.html

Re: [PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite

[Maarten Brock]

On 2018-07-16 18:02, Rob Herring wrote:
>> +Optional properties:
>> +- port-number		: Set Uart port number
>> +- clock-names		: Should be "s_axi_aclk"
>> +- clocks		: Input clock specifier. Refer to common clock bindings.
> 
> How do you calc baud rates if this is omitted?

The uartlite is fixed to some baud rate (actually divisor) in the fpga.
And btw. so are the number of data bits, stop bits and parity.

Maarten

[PATCHv4 1/4] tty: serial: uartlite: Add structure for private data

[Shubhrajyoti Datta]

Add struct uartlite_data, to store the private data of the Uartlite
driver.

Signed-off-by: Tanvi Desai <tanvi.desai@xilinx.com>
Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
 drivers/tty/serial/uartlite.c | 29 +++++++++++++++++++++--------
 1 file changed, 21 insertions(+), 8 deletions(-)

diff --git a/drivers/tty/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index c47db78..0f798f7 100644
--- a/drivers/tty/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
@@ -54,6 +54,10 @@
 #define ULITE_CONTROL_RST_RX   0x02
 #define ULITE_CONTROL_IE       0x10

+struct uartlite_data {
+       const struct uartlite_reg_ops *reg_ops;
+};
+
 struct uartlite_reg_ops {
        u32 (*in)(void __iomem *addr);
        void (*out)(u32 val, void __iomem *addr);
@@ -91,16 +95,16 @@ static const struct uartlite_reg_ops uartlite_le = {

 static inline u32 uart_in32(u32 offset, struct uart_port *port)
 {
-       const struct uartlite_reg_ops *reg_ops = port->private_data;
+       struct uartlite_data *pdata = port->private_data;

-       return reg_ops->in(port->membase + offset);
+       return pdata->reg_ops->in(port->membase + offset);
 }

 static inline void uart_out32(u32 val, u32 offset, struct uart_port *port)
 {
-       const struct uartlite_reg_ops *reg_ops = port->private_data;
+       struct uartlite_data *pdata = port->private_data;

-       reg_ops->out(val, port->membase + offset);
+       pdata->reg_ops->out(val, port->membase + offset);
 }

 static struct uart_port ulite_ports[ULITE_NR_UARTS];
@@ -325,6 +329,7 @@ static void ulite_release_port(struct uart_port *port)

 static int ulite_request_port(struct uart_port *port)
 {
+       struct uartlite_data *pdata = port->private_data;
        int ret;

        pr_debug("ulite console: port=%p; port->mapbase=%llx\n",
@@ -342,13 +347,13 @@ static int ulite_request_port(struct uart_port *port)
                return -EBUSY;
        }

-       port->private_data = (void *)&uartlite_be;
+       pdata->reg_ops = &uartlite_be;
        ret = uart_in32(ULITE_CONTROL, port);
        uart_out32(ULITE_CONTROL_RST_TX, ULITE_CONTROL, port);
        ret = uart_in32(ULITE_STATUS, port);
        /* Endianess detection */
        if ((ret & ULITE_STATUS_TXEMPTY) != ULITE_STATUS_TXEMPTY)
-               port->private_data = (void *)&uartlite_le;
+               pdata->reg_ops = &uartlite_le;

        return 0;
 }
@@ -585,10 +590,12 @@ static struct uart_driver ulite_uart_driver = {
  * @id: requested id number.  Pass -1 for automatic port assignment
  * @base: base address of uartlite registers
  * @irq: irq number for uartlite
+ * @pdata: private data for uartlite
  *
  * Returns: 0 on success, <0 otherwise
  */
-static int ulite_assign(struct device *dev, int id, u32 base, int irq)
+static int ulite_assign(struct device *dev, int id, u32 base, int irq,
+                       struct uartlite_data *pdata)
 {
        struct uart_port *port;
        int rc;
@@ -625,6 +632,7 @@ static int ulite_assign(struct device *dev, int id, u32 base, int irq)
        port->dev = dev;
        port->type = PORT_UNKNOWN;
        port->line = id;
+       port->private_data = pdata;

        dev_set_drvdata(dev, port);

@@ -675,6 +683,7 @@ MODULE_DEVICE_TABLE(of, ulite_of_match);
 static int ulite_probe(struct platform_device *pdev)
 {
        struct resource *res;
+       struct uartlite_data *pdata;
        int irq;
        int id = pdev->id;
 #ifdef CONFIG_OF
@@ -684,6 +693,10 @@ static int ulite_probe(struct platform_device *pdev)
        if (prop)
                id = be32_to_cpup(prop);
 #endif
+       pdata = devm_kzalloc(&pdev->dev, sizeof(struct uartlite_data),
+                            GFP_KERNEL);
+       if (!pdata)
+               return -ENOMEM;

        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
        if (!res)
@@ -693,7 +706,7 @@ static int ulite_probe(struct platform_device *pdev)
        if (irq <= 0)
                return -ENXIO;

-       return ulite_assign(&pdev->dev, id, res->start, irq);
+       return ulite_assign(&pdev->dev, id, res->start, irq, pdata);
 }

 static int ulite_remove(struct platform_device *pdev)
--
2.7.4

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[PATCHv3 4/4] dt-bindings: serial: Add binding for uartlite

[Shubhrajyoti Datta]

The uartlite devicetree binding was missed out.
Add the binding documentation for uartlite that is already in use.

Signed-off-by: Shubhrajyoti Datta <shubhrajyoti.datta@xilinx.com>
---
v2:
lowercase for hex values
interrupt description updated
v3:
squashed the clock changes
v4:
Updated the patch description
and the interrupt description

 .../bindings/serial/xlnx,opb-uartlite.txt          | 23 ++++++++++++++++++++++
 1 file changed, 23 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt

diff --git a/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
new file mode 100644
index 0000000..52719b9
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/xlnx,opb-uartlite.txt
@@ -0,0 +1,23 @@
+Xilinx Axi Uartlite controller Device Tree Bindings
+---------------------------------------------------------
+
+Required properties:
+- compatible           : Can be either of
+                               "xlnx,xps-uartlite-1.00.a"
+                               "xlnx,opb-uartlite-1.00.b"
+- reg                  : Physical base address and size of the Axi Uartlite
+                         registers map.
+- interrupts           : Should contain the UART controller interrupt.
+
+Optional properties:
+- port-number          : Set Uart port number
+- clock-names          : Should be "s_axi_aclk"
+- clocks               : Input clock specifier. Refer to common clock bindings.
+
+Example:
+serial@800c0000 {
+       compatible = "xlnx,xps-uartlite-1.00.a";
+       reg = <0x0 0x800c0000 0x10000>;
+       interrupts = <0x0 0x6e 0x1>;
+       port-number = <0>;
+};
--
2.7.4

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