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[86.9.131.95]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-441b8a315bdsm178436865e9.39.2025.05.06.09.18.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 06 May 2025 09:18:23 -0700 (PDT) Date: Tue, 6 May 2025 17:18:22 +0100 From: Stafford Horne To: "Rob Herring (Arm)" Cc: Thomas Gleixner , Krzysztof Kozlowski , Conor Dooley , Stefan Kristiansson , linux-kernel@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH] dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema Message-ID: References: <20250505144803.1291424-1-robh@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250505144803.1291424-1-robh@kernel.org> On Mon, May 05, 2025 at 09:48:02AM -0500, Rob Herring (Arm) wrote: > Convert the OpenRISC PIC interrupt controller binding to schema > format. It's a straight-forward conversion of the typical interrupt > controller. > > Signed-off-by: Rob Herring (Arm) > --- > .../opencores,or1k-pic.txt | 23 ----------- > .../opencores,or1k-pic.yaml | 38 +++++++++++++++++++ > 2 files changed, 38 insertions(+), 23 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt > create mode 100644 Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml > > diff --git a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt > deleted file mode 100644 > index 55c04faa3f3f..000000000000 > --- a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.txt > +++ /dev/null > @@ -1,23 +0,0 @@ > -OpenRISC 1000 Programmable Interrupt Controller > - > -Required properties: > - > -- compatible : should be "opencores,or1k-pic-level" for variants with > - level triggered interrupt lines, "opencores,or1k-pic-edge" for variants with > - edge triggered interrupt lines or "opencores,or1200-pic" for machines > - with the non-spec compliant or1200 type implementation. > - > - "opencores,or1k-pic" is also provided as an alias to "opencores,or1200-pic", > - but this is only for backwards compatibility. > - > -- interrupt-controller : Identifies the node as an interrupt controller > -- #interrupt-cells : Specifies the number of cells needed to encode an > - interrupt source. The value shall be 1. > - > -Example: > - > -intc: interrupt-controller { > - compatible = "opencores,or1k-pic-level"; > - interrupt-controller; > - #interrupt-cells = <1>; > -}; > diff --git a/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml > new file mode 100644 > index 000000000000..995b68c3aed4 > --- /dev/null > +++ b/Documentation/devicetree/bindings/interrupt-controller/opencores,or1k-pic.yaml > @@ -0,0 +1,38 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/interrupt-controller/opencores,or1k-pic.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: OpenRISC 1000 Programmable Interrupt Controller > + > +maintainers: > + - Stefan Kristiansson > + > +properties: > + compatible: > + enum: > + - opencores,or1k-pic-level > + - opencores,or1k-pic-edge > + - opencores,or1200-pic > + - opencores,or1k-pic > + > + interrupt-controller: true > + > + '#interrupt-cells': > + const: 1 > + > +required: > + - compatible > + - interrupt-controller > + - '#interrupt-cells' > + > +additionalProperties: false > + > +examples: > + - | > + interrupt-controller { > + compatible = "opencores,or1k-pic-level"; > + interrupt-controller; > + #interrupt-cells = <1>; > + }; This looks ok to me, I will queue via the OpenRISC queue. -Stafford