[PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Igor Belwon]

Hi all!

This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
This SoC has a combo PHY that supports highspeed, superspeed USB and
DisplayPort, however due to my inability to test the superspeed part of
the combo phy (device always enumerated as high-speed, even on the
vendor kernels/bootloaders) only the highspeed part is brought up.

These changes have been tested and confirmed working (with the USB_ETH
gadget and telnet/ssh in a ramdisk) on a device from the hubble family
(x1s) and also a device from the canvas family (c1s).

Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
Changes in v2:
- rebase patch to apply cleanly after Exynos7870 merge
- collect Reviewed-by tags by Krzysztof Kozlowski (thanks!)

---
Igor Belwon (2):
      dt-bindings: phy: samsung,usb3-drd-phy: Add exynos990 compatible
      phy: exynos5-usbdrd: Add support for the Exynos990 usbdrd phy

 .../bindings/phy/samsung,usb3-drd-phy.yaml         |  2 ++
 drivers/phy/samsung/phy-exynos5-usbdrd.c           | 32 ++++++++++++++++++++++
 include/linux/soc/samsung/exynos-regs-pmu.h        |  3 ++
 3 files changed, 37 insertions(+)
---
base-commit: bc8aa6cdadcc00862f2b5720e5de2e17f696a081
change-id: 20250420-usb-resends-april-46c2d3b8d0d6

Best regards,
-- 
Igor Belwon <igor.belwon@mentallysanemainliners.org>

[PATCH v2 1/2] dt-bindings: phy: samsung,usb3-drd-phy: Add exynos990 compatible

[Igor Belwon]

Add a compatible for the exynos990-usbdrd-phy. The PHY is compatible with
the older exynos5420 design (two clocks) when running in highspeed mode.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
 Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
index fdddddc7d611364ce17870b5b8963b5a0c0c9668..5b240fc761c38b49fa4f673ea4fff0609470b414 100644
--- a/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
+++ b/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
@@ -32,6 +32,7 @@ properties:
       - samsung,exynos7-usbdrd-phy
       - samsung,exynos7870-usbdrd-phy
       - samsung,exynos850-usbdrd-phy
+      - samsung,exynos990-usbdrd-phy
 
   clocks:
     minItems: 2
@@ -187,6 +188,7 @@ allOf:
               - samsung,exynos5420-usbdrd-phy
               - samsung,exynos7870-usbdrd-phy
               - samsung,exynos850-usbdrd-phy
+              - samsung,exynos990-usbdrd-phy
     then:
       properties:
         clocks:

-- 
2.47.2

[PATCH v2 2/2] phy: exynos5-usbdrd: Add support for the Exynos990 usbdrd phy

[Igor Belwon]

The Exynos990 usbdrd PHY is a combo PHY which supports USB SS, HS and
DisplayPort outputs. This commit adds support only for UTMI+ (USB HS).

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org>
---
 drivers/phy/samsung/phy-exynos5-usbdrd.c    | 32 +++++++++++++++++++++++++++++
 include/linux/soc/samsung/exynos-regs-pmu.h |  3 +++
 2 files changed, 35 insertions(+)

diff --git a/drivers/phy/samsung/phy-exynos5-usbdrd.c b/drivers/phy/samsung/phy-exynos5-usbdrd.c
index 634c4310c660a50e5d0869645506ab1b64fffd4b..9136752ab15f034059069b2607e47c5f72c04e2a 100644
--- a/drivers/phy/samsung/phy-exynos5-usbdrd.c
+++ b/drivers/phy/samsung/phy-exynos5-usbdrd.c
@@ -1847,6 +1847,35 @@ static const struct exynos5_usbdrd_phy_drvdata exynos850_usbdrd_phy = {
 	.n_regulators		= ARRAY_SIZE(exynos5_regulator_names),
 };
 
+static const struct exynos5_usbdrd_phy_tuning exynos990_tunes_utmi_postinit[] = {
+	PHY_TUNING_ENTRY_PHY(EXYNOS850_DRD_HSPPARACON,
+			     (HSPPARACON_TXVREF |
+			      HSPPARACON_TXPREEMPAMP | HSPPARACON_SQRX |
+			      HSPPARACON_COMPDIS),
+			     (FIELD_PREP_CONST(HSPPARACON_TXVREF, 7) |
+			      FIELD_PREP_CONST(HSPPARACON_TXPREEMPAMP, 3) |
+			      FIELD_PREP_CONST(HSPPARACON_SQRX, 5) |
+			      FIELD_PREP_CONST(HSPPARACON_COMPDIS, 7))),
+	PHY_TUNING_ENTRY_LAST
+};
+
+static const struct exynos5_usbdrd_phy_tuning *exynos990_tunes[PTS_MAX] = {
+	[PTS_UTMI_POSTINIT] = exynos990_tunes_utmi_postinit,
+};
+
+static const struct exynos5_usbdrd_phy_drvdata exynos990_usbdrd_phy = {
+	.phy_cfg		= phy_cfg_exynos850,
+	.phy_ops		= &exynos850_usbdrd_phy_ops,
+	.phy_tunes		= exynos990_tunes,
+	.pmu_offset_usbdrd0_phy	= EXYNOS990_PHY_CTRL_USB20,
+	.clk_names		= exynos5_clk_names,
+	.n_clks			= ARRAY_SIZE(exynos5_clk_names),
+	.core_clk_names		= exynos5_core_clk_names,
+	.n_core_clks		= ARRAY_SIZE(exynos5_core_clk_names),
+	.regulator_names	= exynos5_regulator_names,
+	.n_regulators		= ARRAY_SIZE(exynos5_regulator_names),
+};
+
 static const struct exynos5_usbdrd_phy_config phy_cfg_gs101[] = {
 	{
 		.id		= EXYNOS5_DRDPHY_UTMI,
@@ -2047,6 +2076,9 @@ static const struct of_device_id exynos5_usbdrd_phy_of_match[] = {
 	}, {
 		.compatible = "samsung,exynos850-usbdrd-phy",
 		.data = &exynos850_usbdrd_phy
+	}, {
+		.compatible = "samsung,exynos990-usbdrd-phy",
+		.data = &exynos990_usbdrd_phy
 	},
 	{ },
 };
diff --git a/include/linux/soc/samsung/exynos-regs-pmu.h b/include/linux/soc/samsung/exynos-regs-pmu.h
index cde299a85384a70d04dae49ee9a4e2daa88fbbf6..6a1f50c2a2942ea3d14fdc779feb2e3ecabc84ea 100644
--- a/include/linux/soc/samsung/exynos-regs-pmu.h
+++ b/include/linux/soc/samsung/exynos-regs-pmu.h
@@ -659,6 +659,9 @@
 #define EXYNOS5433_PAD_RETENTION_UFS_OPTION			(0x3268)
 #define EXYNOS5433_PAD_RETENTION_FSYSGENIO_OPTION		(0x32A8)
 
+/* For Exynos990 */
+#define EXYNOS990_PHY_CTRL_USB20				(0x72C)
+
 /* For Tensor GS101 */
 #define GS101_SYSIP_DAT0					(0x810)
 #define GS101_SYSTEM_CONFIGURATION				(0x3A00)

-- 
2.47.2

Re: [PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Vinod Koul]

On 20-04-25, 21:28, Igor Belwon wrote:
> Hi all!
> 
> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
> This SoC has a combo PHY that supports highspeed, superspeed USB and
> DisplayPort, however due to my inability to test the superspeed part of
> the combo phy (device always enumerated as high-speed, even on the
> vendor kernels/bootloaders) only the highspeed part is brought up.
> 
> These changes have been tested and confirmed working (with the USB_ETH
> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
> (x1s) and also a device from the canvas family (c1s).

I am missing the dt patch, can you pls report the whole series if you
would like me to review and apply this

-- 
~Vinod

Re: [PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Igor Belwon]

On Wed May 14, 2025 at 10:42 AM CEST, Vinod Koul wrote:
> On 20-04-25, 21:28, Igor Belwon wrote:
>> Hi all!
>> 
>> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
>> This SoC has a combo PHY that supports highspeed, superspeed USB and
>> DisplayPort, however due to my inability to test the superspeed part of
>> the combo phy (device always enumerated as high-speed, even on the
>> vendor kernels/bootloaders) only the highspeed part is brought up.
>> 
>> These changes have been tested and confirmed working (with the USB_ETH
>> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
>> (x1s) and also a device from the canvas family (c1s).
>
> I am missing the dt patch, can you pls report the whole series if you
> would like me to review and apply this

Hi Vinod,

I've sent the DT series a while back (before resending). Usually I
propose DT changes through Krzysztof's tree. The patches are 
unchanged (they will be resent unchanged when all usb and wdt 
changes are merged).

Here is the patchset:
- on patchwork: https://patchwork.kernel.org/project/linux-samsung-soc/patch/20250217-exynos990-dt-changes-febuary-v1-2-99935218cbf4@mentallysanemainliners.org/
- on the mailing list archives: https://lore.kernel.org/all/20250217-exynos990-dt-changes-febuary-v1-2-99935218cbf4@mentallysanemainliners.org/

Best regards
- Igor

Re: [PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Vinod Koul]

On 14-05-25, 16:26, Igor Belwon wrote:
> On Wed May 14, 2025 at 10:42 AM CEST, Vinod Koul wrote:
> > On 20-04-25, 21:28, Igor Belwon wrote:
> >> Hi all!
> >> 
> >> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
> >> This SoC has a combo PHY that supports highspeed, superspeed USB and
> >> DisplayPort, however due to my inability to test the superspeed part of
> >> the combo phy (device always enumerated as high-speed, even on the
> >> vendor kernels/bootloaders) only the highspeed part is brought up.
> >> 
> >> These changes have been tested and confirmed working (with the USB_ETH
> >> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
> >> (x1s) and also a device from the canvas family (c1s).
> >
> > I am missing the dt patch, can you pls report the whole series if you
> > would like me to review and apply this
> 
> Hi Vinod,
> 
> I've sent the DT series a while back (before resending). Usually I
> propose DT changes through Krzysztof's tree. The patches are 
> unchanged (they will be resent unchanged when all usb and wdt 
> changes are merged).

It makes sense to post bindings and driver togther and mostly these go
thru subsystem trees!

> 
> Here is the patchset:
> - on patchwork: https://patchwork.kernel.org/project/linux-samsung-soc/patch/20250217-exynos990-dt-changes-febuary-v1-2-99935218cbf4@mentallysanemainliners.org/
> - on the mailing list archives: https://lore.kernel.org/all/20250217-exynos990-dt-changes-febuary-v1-2-99935218cbf4@mentallysanemainliners.org/
> 
> Best regards
> - Igor

-- 
~Vinod

Re: [PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Krzysztof Kozlowski]

On 15/05/2025 10:20, Vinod Koul wrote:
> On 14-05-25, 16:26, Igor Belwon wrote:
>> On Wed May 14, 2025 at 10:42 AM CEST, Vinod Koul wrote:
>>> On 20-04-25, 21:28, Igor Belwon wrote:
>>>> Hi all!
>>>>
>>>> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
>>>> This SoC has a combo PHY that supports highspeed, superspeed USB and
>>>> DisplayPort, however due to my inability to test the superspeed part of
>>>> the combo phy (device always enumerated as high-speed, even on the
>>>> vendor kernels/bootloaders) only the highspeed part is brought up.
>>>>
>>>> These changes have been tested and confirmed working (with the USB_ETH
>>>> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
>>>> (x1s) and also a device from the canvas family (c1s).
>>>
>>> I am missing the dt patch, can you pls report the whole series if you
>>> would like me to review and apply this
>>
>> Hi Vinod,
>>
>> I've sent the DT series a while back (before resending). Usually I
>> propose DT changes through Krzysztof's tree. The patches are 
>> unchanged (they will be resent unchanged when all usb and wdt 
>> changes are merged).
> 
> It makes sense to post bindings and driver togther and mostly these go
> thru subsystem trees!
> 
I don't think you both speak about the same thing. DT is ambiguous here,
so always use DTS or DT bindings... that said bindings were here in this
patchset so if Vinod misses them, this has to be resent.

Best regards,
Krzysztof

Re: [PATCH v2 0/2] USB PHY support for Exynos990 SoCs

[Igor Belwon]

On Thu May 15, 2025 at 11:14 AM CEST, Krzysztof Kozlowski wrote:
> On 15/05/2025 10:20, Vinod Koul wrote:
>> On 14-05-25, 16:26, Igor Belwon wrote:
>>> On Wed May 14, 2025 at 10:42 AM CEST, Vinod Koul wrote:
>>>> On 20-04-25, 21:28, Igor Belwon wrote:
>>>>> Hi all!
>>>>>
>>>>> This patchset adds support for the USB 2.0 PHY of the Exynos990 SoC.
>>>>> This SoC has a combo PHY that supports highspeed, superspeed USB and
>>>>> DisplayPort, however due to my inability to test the superspeed part of
>>>>> the combo phy (device always enumerated as high-speed, even on the
>>>>> vendor kernels/bootloaders) only the highspeed part is brought up.
>>>>>
>>>>> These changes have been tested and confirmed working (with the USB_ETH
>>>>> gadget and telnet/ssh in a ramdisk) on a device from the hubble family
>>>>> (x1s) and also a device from the canvas family (c1s).
>>>>
>>>> I am missing the dt patch, can you pls report the whole series if you
>>>> would like me to review and apply this
>>>
>>> Hi Vinod,
>>>
>>> I've sent the DT series a while back (before resending). Usually I
>>> propose DT changes through Krzysztof's tree. The patches are 
>>> unchanged (they will be resent unchanged when all usb and wdt 
>>> changes are merged).
>> 
>> It makes sense to post bindings and driver togther and mostly these go
>> thru subsystem trees!
>> 
> I don't think you both speak about the same thing. DT is ambiguous here,
> so always use DTS or DT bindings... that said bindings were here in this
> patchset so if Vinod misses them, this has to be resent.
>
> Best regards,
> Krzysztof

Hi Krzysztof, Vinod.

Krzysztof: Thank you for the clarification. I assumed somehow the
devicetree changes were necessary for the revies. Bad judgment on my part.
Sorry.

Vinod: Sorry for the misunderstanding. I'll resend the patchset shortly.

Regards,
Igor