From: Yao Zi <ziyao@disroot.org>
To: Binbin Zhou <zhoubb.aaron@gmail.com>
Cc: "Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Huacai Chen" <chenhuacai@kernel.org>,
"WANG Xuerui" <kernel@xen0n.name>,
"Neil Armstrong" <neil.armstrong@linaro.org>,
"Heiko Stuebner" <heiko@sntech.de>,
"Junhao Xie" <bigfoot@classfun.cn>,
"Rafał Miłecki" <rafal@milecki.pl>,
"Aradhya Bhatia" <a-bhatia1@ti.com>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Binbin Zhou" <zhoubinbin@loongson.cn>,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
loongarch@lists.linux.dev, "Mingcong Bai" <jeffbai@aosc.io>,
"Kexy Biscuit" <kexybiscuit@aosc.io>
Subject: Re: [PATCH v2 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300
Date: Mon, 19 May 2025 07:49:47 +0000 [thread overview]
Message-ID: <aCrim32dGexKJvXl@pie.lan> (raw)
In-Reply-To: <CAMpQs4L7U=Mkw=pburiUpJLEm=tHeMOW+6PRhWPTMnOGHxFqyA@mail.gmail.com>
On Mon, May 19, 2025 at 11:10:16AM +0800, Binbin Zhou wrote:
> Hi Yao:
>
> Thanks for your patch.
>
> On Sun, May 18, 2025 at 4:05 PM Yao Zi <ziyao@disroot.org> wrote:
> >
> > Add SoC devicetree for 2K0300 SoC, which features one LA264 dual-issue
> > core and targets embedded market. Only CPU core, legacy interrupt
> > controllers and UARTs are defined for now.
> >
> > Signed-off-by: Yao Zi <ziyao@disroot.org>
> > ---
> > arch/loongarch/boot/dts/loongson-2k0300.dtsi | 184 +++++++++++++++++++
> > 1 file changed, 184 insertions(+)
> > create mode 100644 arch/loongarch/boot/dts/loongson-2k0300.dtsi
> >
> > diff --git a/arch/loongarch/boot/dts/loongson-2k0300.dtsi b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > new file mode 100644
> > index 000000000000..17974f793947
> > --- /dev/null
> > +++ b/arch/loongarch/boot/dts/loongson-2k0300.dtsi
> > @@ -0,0 +1,184 @@
> > +// SPDX-License-Identifier: GPL-2.0
> > +/*
> > + * Copyright (C) 2025 Loongson Technology Corporation Limited
> > + * Copyright (C) 2025 Yao Zi <ziyao@disroot.org>
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include <dt-bindings/interrupt-controller/irq.h>
> > +
> > +/ {
> > + compatible = "loongson,ls2k0300";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > +
> > + cpus {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + cpu0: cpu@0 {
> > + compatible = "loongson,la264";
> > + reg = <0>;
> > + device_type = "cpu";
> > + clocks = <&cpu_clk>;
> > + };
> > +
> > + };
> > +
> > + cpuintc: interrupt-controller {
> > + compatible = "loongson,cpu-interrupt-controller";
> > + interrupt-controller;
> > + #interrupt-cells = <1>;
> > + };
> > +
> > + cpu_clk: clock-1000m {
> > + compatible = "fixed-clock";
> > + clock-frequency = <1000000000>;
> > + #clock-cells = <0>;
> > + };
> > +
> > + soc {
> I found the following warning while doing dtbs_check, please check again:
>
> DTC [C] arch/loongarch/boot/dts/ls2k0300-ctcisz-forever-pi.dtb
> arch/loongarch/boot/dts/loongson-2k0300.dtsi:41.6-183.4: Warning
> (unit_address_vs_reg): /soc: node has a reg or ranges property, but no
> unit name
Oops, seems -Wunit_address_vs_reg is silent without W=1 specified.
Commit 8654cb8d0371 (dtc: update warning settings for new bus and
node/property name checks, 2017-03-21) shows it's a temporary workaround
("Disable the new dtc warnings by default as there are 1000s").
I'll the node to soc@10000000 in v3. Thanks for catching something I've
never noticed before. Yanteng, is it okay for you to keep your
reviewed-by tag with the change?
> > + compatible = "simple-bus";
> > + #address-cells = <2>;
> > + #size-cells = <2>;
> > + ranges = <0x00 0x10000000 0x00 0x10000000 0x0 0x10000000>,
> > + <0x00 0x02000000 0x00 0x02000000 0x0 0x04000000>,
> > + <0x00 0x40000000 0x00 0x40000000 0x0 0x40000000>;
> > +
...
> > 2.49.0
> >
> >
>
> --
> Thanks.
> Binbin
>
Thanks,
Yao Zi
next prev parent reply other threads:[~2025-05-19 7:50 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-18 8:03 [PATCH v2 0/4] Initial support for CTCISZ Forever Pi Yao Zi
2025-05-18 8:03 ` [PATCH v2 1/4] dt-bindings: vendor-prefixes: Add CTCISZ Technology Co., LTD Yao Zi
2025-05-18 8:03 ` [PATCH v2 2/4] dt-bindings: LoongArch: Add CTCISZ Forever Pi Yao Zi
2025-05-18 10:41 ` Krzysztof Kozlowski
2025-05-18 8:03 ` [PATCH v2 3/4] LoongArch: dts: Add initial SoC devicetree for Loongson 2K0300 Yao Zi
2025-05-19 3:10 ` Binbin Zhou
2025-05-19 7:49 ` Yao Zi [this message]
2025-05-18 8:03 ` [PATCH v2 4/4] LoongArch: dts: Add initial devicetree for CTCISZ Forever Pi Yao Zi
2025-05-19 7:58 ` Binbin Zhou
2025-05-19 9:42 ` Yao Zi
2025-05-19 9:51 ` Binbin Zhou
2025-05-19 1:33 ` [PATCH v2 0/4] Initial support " Yanteng Si
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aCrim32dGexKJvXl@pie.lan \
--to=ziyao@disroot.org \
--cc=a-bhatia1@ti.com \
--cc=bigfoot@classfun.cn \
--cc=chenhuacai@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=heiko@sntech.de \
--cc=jeffbai@aosc.io \
--cc=kernel@xen0n.name \
--cc=kexybiscuit@aosc.io \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=loongarch@lists.linux.dev \
--cc=manivannan.sadhasivam@linaro.org \
--cc=neil.armstrong@linaro.org \
--cc=rafal@milecki.pl \
--cc=robh@kernel.org \
--cc=zhoubb.aaron@gmail.com \
--cc=zhoubinbin@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox