From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-m16.yeah.net (mail-m16.yeah.net [220.197.32.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6CDEB2C3248; Mon, 2 Jun 2025 03:37:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.32.16 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748835478; cv=none; b=gfve1k6QTsQ7dkARjJYF88QgPRjJ6vfpM+Wnt63yQWJCmhLOQlo1gAzrVyQCbtMcinZb8J4OPoWYB5Ut+i70eaqN7fx0MYttJfZIArBzBpPjpb5kTScNL/RRLGwOf67uoN17sT3XTdycCBaL/7niWjSERPwKtcxSKp5mOMObyq0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1748835478; c=relaxed/simple; bh=VjTnE2LjwAWsqOvJzf6LbkHd54Vlh/7sHHG7voGUxVM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=p/9R15pyFjsUYWqd3b2c4paaFLinOEPoMyrRNm/JhR2ghg+n0+nGoH8x1r4azFYQvukp+VjWhTVvupv/RcP2UCAV4XFj06yc4Afz0v7Ju3D1i/2Uj2jLAmBsaAnKsxbKt8w+mdWDopB51QEf0iioZ+FEe7zC8QNzo2U9fSvvYYk= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=yeah.net; spf=pass smtp.mailfrom=yeah.net; dkim=pass (1024-bit key) header.d=yeah.net header.i=@yeah.net header.b=g4FQDeae; arc=none smtp.client-ip=220.197.32.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=yeah.net Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=yeah.net Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=yeah.net header.i=@yeah.net header.b="g4FQDeae" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=yeah.net; s=s110527; h=Date:From:To:Subject:Message-ID:MIME-Version: Content-Type; bh=6TrL7BinwkWHJjPU+02xbpS7IyOpQNUsweu7b9r8yR4=; b=g4FQDeae74gunvn3OmQwZrqwZiP9CmQmErv3Ym178a+mpFBE+fpVE+tMV23Ssv 134fmUZSj7sKRq6Ihzq5FfBRhDFAl8qqn17uHz6C9lM8U9leCdRraqFx+lTMe8c0 rQK2uLgu8GznEQY47aleDAJF2j8UmqLbn6G7KbjKV/wHQ= Received: from dragon (unknown []) by gzsmtp2 (Coremail) with SMTP id Ms8vCgAHxs7IGT1oRPJ4Ag--.18543S3; Mon, 02 Jun 2025 11:26:03 +0800 (CST) Date: Mon, 2 Jun 2025 11:26:00 +0800 From: Shawn Guo To: Laurentiu Mihalcea Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Daniel Baluta , Shengjiu Wang , Frank Li , Marco Felsch , Marc Kleine-Budde , Alexander Stein , Pengutronix Kernel Team , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 3/6] bus: add driver for IMX AIPSTZ bridge Message-ID: References: <20250415171919.5623-1-laurentiumihalcea111@gmail.com> <20250415171919.5623-4-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250415171919.5623-4-laurentiumihalcea111@gmail.com> X-CM-TRANSID:Ms8vCgAHxs7IGT1oRPJ4Ag--.18543S3 X-Coremail-Antispam: 1Uf129KBjvJXoWxKr1rKF1DCr47Zw1xXFW3GFg_yoW7tr4xpa y8XF1fGF47XF13twsxKrW29F98Kan7G34j9ry7W343urn8uFyvkrZY9rySkF4rCr9rt3Wj qrWYqrW7ur4qv3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07U3EfrUUUUU= X-CM-SenderInfo: pvkd40hjxrjqh1hdxhhqhw/1tbiEhtgZWg9DPQ+BgAAsZ On Tue, Apr 15, 2025 at 01:19:16PM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea > > The secure AHB to IP Slave (AIPSTZ) bus bridge provides access control > configurations meant to restrict access to certain peripherals. > Some of the configurations include: > > 1) Marking masters as trusted for R/W. Based on this > (and the configuration of the accessed peripheral), the bridge > may choose to abort the R/W transactions issued by certain > masters. > > 2) Allowing/disallowing write accesses to peripherals. > > Add driver for this IP. Since there's currently no framework for > access controllers (and since there's currently no need for having > flexibility w.r.t the configurations) all this driver does is it > applies a relaxed, "default" configuration, in which all masters > are trusted for R/W. > > Note that some instances of this IP (e.g: AIPSTZ5 on i.MX8MP) may be tied > to a power domain and may lose their configuration when the domain is > powered off. This is why the configuration has to be restored when the > domain is powered on. > > Co-developed-by: Daniel Baluta > Signed-off-by: Daniel Baluta > Signed-off-by: Laurentiu Mihalcea > --- > drivers/bus/Kconfig | 6 +++ > drivers/bus/Makefile | 1 + > drivers/bus/imx-aipstz.c | 92 ++++++++++++++++++++++++++++++++++++++++ > 3 files changed, 99 insertions(+) > create mode 100644 drivers/bus/imx-aipstz.c > > diff --git a/drivers/bus/Kconfig b/drivers/bus/Kconfig > index ff669a8ccad9..fe7600283e70 100644 > --- a/drivers/bus/Kconfig > +++ b/drivers/bus/Kconfig > @@ -87,6 +87,12 @@ config HISILICON_LPC > Driver to enable I/O access to devices attached to the Low Pin > Count bus on the HiSilicon Hip06/7 SoC. > > +config IMX_AIPSTZ > + tristate "Support for IMX Secure AHB to IP Slave bus (AIPSTZ) bridge" > + depends on ARCH_MXC > + help > + Enable support for IMX AIPSTZ bridge. > + > config IMX_WEIM > bool "Freescale EIM DRIVER" > depends on ARCH_MXC || COMPILE_TEST > diff --git a/drivers/bus/Makefile b/drivers/bus/Makefile > index cddd4984d6af..8e693fe8a03a 100644 > --- a/drivers/bus/Makefile > +++ b/drivers/bus/Makefile > @@ -15,6 +15,7 @@ obj-$(CONFIG_FSL_MC_BUS) += fsl-mc/ > > obj-$(CONFIG_BT1_APB) += bt1-apb.o > obj-$(CONFIG_BT1_AXI) += bt1-axi.o > +obj-$(CONFIG_IMX_AIPSTZ) += imx-aipstz.o > obj-$(CONFIG_IMX_WEIM) += imx-weim.o > obj-$(CONFIG_INTEL_IXP4XX_EB) += intel-ixp4xx-eb.o > obj-$(CONFIG_MIPS_CDMM) += mips_cdmm.o > diff --git a/drivers/bus/imx-aipstz.c b/drivers/bus/imx-aipstz.c > new file mode 100644 > index 000000000000..44db40dae71b > --- /dev/null > +++ b/drivers/bus/imx-aipstz.c > @@ -0,0 +1,92 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright 2025 NXP > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define IMX_AIPSTZ_MPR0 0x0 > + > +struct imx_aipstz_config { > + u32 mpr0; > +}; Would it be more future-proof to have something like this? struct imx_aipstz_priv { __iomem *base; const struct imx_aipstz_config *default_cfg; }; With imx_aipstz_priv being drvdata, it could be easily scaled to have more data later if needed. Shawn > + > +static void imx_aipstz_apply_default(void __iomem *base, > + const struct imx_aipstz_config *default_cfg) > +{ > + writel(default_cfg->mpr0, base + IMX_AIPSTZ_MPR0); > +} > + > +static int imx_aipstz_probe(struct platform_device *pdev) > +{ > + const struct imx_aipstz_config *default_cfg; > + void __iomem *base; > + > + base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL); > + if (IS_ERR(base)) > + return dev_err_probe(&pdev->dev, -ENOMEM, > + "failed to get/ioremap AC memory\n"); > + > + default_cfg = of_device_get_match_data(&pdev->dev); > + > + imx_aipstz_apply_default(base, default_cfg); > + > + dev_set_drvdata(&pdev->dev, base); > + > + pm_runtime_set_active(&pdev->dev); > + devm_pm_runtime_enable(&pdev->dev); > + > + return devm_of_platform_populate(&pdev->dev); > +} > + > +static int imx_aipstz_runtime_resume(struct device *dev) > +{ > + const struct imx_aipstz_config *default_cfg; > + void __iomem *base; > + > + base = dev_get_drvdata(dev); > + default_cfg = of_device_get_match_data(dev); > + > + /* restore potentially lost configuration during domain power-off */ > + imx_aipstz_apply_default(base, default_cfg); > + > + return 0; > +} > + > +static const struct dev_pm_ops imx_aipstz_pm_ops = { > + RUNTIME_PM_OPS(NULL, imx_aipstz_runtime_resume, NULL) > + SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume) > +}; > + > +/* > + * following configuration is equivalent to: > + * masters 0-7 => trusted for R/W + use AHB's HPROT[1] to det. privilege > + */ > +static const struct imx_aipstz_config imx8mp_aipstz_default_cfg = { > + .mpr0 = 0x77777777, > +}; > + > +static const struct of_device_id imx_aipstz_of_ids[] = { > + { .compatible = "fsl,imx8mp-aipstz", .data = &imx8mp_aipstz_default_cfg }, > + { } > +}; > +MODULE_DEVICE_TABLE(of, imx_aipstz_of_ids); > + > +static struct platform_driver imx_aipstz_of_driver = { > + .probe = imx_aipstz_probe, > + .driver = { > + .name = "imx-aipstz", > + .of_match_table = imx_aipstz_of_ids, > + .pm = pm_ptr(&imx_aipstz_pm_ops), > + }, > +}; > +module_platform_driver(imx_aipstz_of_driver); > + > +MODULE_LICENSE("GPL"); > +MODULE_DESCRIPTION("IMX secure AHB to IP Slave bus (AIPSTZ) bridge driver"); > +MODULE_AUTHOR("Laurentiu Mihalcea "); > -- > 2.34.1 >