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Mon, 02 Jun 2025 12:11:52 +0800 (CST) Date: Mon, 2 Jun 2025 12:11:50 +0800 From: Shawn Guo To: Laurentiu Mihalcea Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Fabio Estevam , Daniel Baluta , Shengjiu Wang , Frank Li , Marco Felsch , Marc Kleine-Budde , Alexander Stein , Pengutronix Kernel Team , devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v6 5/6] arm64: dts: imx8mp: add aipstz-related definitions Message-ID: References: <20250415171919.5623-1-laurentiumihalcea111@gmail.com> <20250415171919.5623-6-laurentiumihalcea111@gmail.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250415171919.5623-6-laurentiumihalcea111@gmail.com> X-CM-TRANSID:M88vCgBX1cmGJD1oH4VrAg--.29433S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7Cr1UJF47XryUAF4xZF17GFg_yoW5JFyfpa 43CryUCr1IkF47G3sFvr1fJrn8Ka1fAF429w4agrW8KrnI9a48Kr4Fqr1SgrsFqrn3Ca1F 9Fn0vw1xurnxX3DanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x07U3PEfUUUUU= X-CM-SenderInfo: pvkd40hjxrjqh1hdxhhqhw/1tbiNAiU+Wg9JIjiHQAA3X On Tue, Apr 15, 2025 at 01:19:18PM -0400, Laurentiu Mihalcea wrote: > From: Laurentiu Mihalcea > > Add header file with AIPSTZ-related definitions: consumer types, > master/peripheral configuration bits, and master ID definitions. > > Signed-off-by: Laurentiu Mihalcea > --- > arch/arm64/boot/dts/freescale/imx8mp-aipstz.h | 33 +++++++++++++++++++ > arch/arm64/boot/dts/freescale/imx8mp.dtsi | 1 + > 2 files changed, 34 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > new file mode 100644 > index 000000000000..b5bfcbcf38b8 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-aipstz.h > @@ -0,0 +1,33 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */ > +/* > + * Copyright 2025 NXP > + */ > + > +#ifndef __IMX8MP_AIPSTZ_H > +#define __IMX8MP_AIPSTZ_H > + > +/* consumer type - master or peripheral */ > +#define IMX8MP_AIPSTZ_MASTER 0x0 > +#define IMX8MP_AIPSTZ_PERIPH 0x1 > + > +/* master configuration options */ > +#define IMX8MP_AIPSTZ_MPL (1 << 0) > +#define IMX8MP_AIPSTZ_MTW (1 << 1) > +#define IMX8MP_AIPSTZ_MTR (1 << 2) > +#define IMX8MP_AIPSTZ_MBW (1 << 3) > + > +/* peripheral configuration options */ > +#define IMX8MP_AIPSTZ_TP (1 << 0) > +#define IMX8MP_AIPSTZ_WP (1 << 1) > +#define IMX8MP_AIPSTZ_SP (1 << 2) > +#define IMX8MP_AIPSTZ_BW (1 << 3) > + > +/* master ID definitions */ > +#define IMX8MP_AIPSTZ_EDMA 0 /* AUDIOMIX EDMA */ > +#define IMX8MP_AIPSTZ_CA53 1 /* Cortex-A53 cluster */ > +#define IMX8MP_AIPSTZ_SDMA2 3 /* AUDIOMIX SDMA2 */ > +#define IMX8MP_AIPSTZ_SDMA3 3 /* AUDIOMIX SDMA3 */ > +#define IMX8MP_AIPSTZ_HIFI4 5 /* HIFI4 DSP */ > +#define IMX8MP_AIPSTZ_CM7 6 /* Cortex-M7 */ Could we use tabs to align all these values vertically? Shawn > + > +#endif /* __IMX8MP_AIPSTZ_H */ > diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > index aa7940c65f2d..ebbc99f9ceba 100644 > --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi > +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi > @@ -12,6 +12,7 @@ > #include > #include > > +#include "imx8mp-aipstz.h" > #include "imx8mp-pinfunc.h" > > / { > -- > 2.34.1 >