From: Abel Vesa <abel.vesa@linaro.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Cc: Abhinav Kumar <quic_abhinavk@quicinc.com>,
Sean Paul <sean@poorly.run>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Simona Vetter <simona@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Krishna Manikandan <quic_mkrishn@quicinc.com>,
Jonathan Marek <jonathan@marek.ca>,
Kuogee Hsieh <quic_khsieh@quicinc.com>,
Neil Armstrong <neil.armstrong@linaro.org>,
Dmitry Baryshkov <lumag@kernel.org>,
Rob Clark <robdclark@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, Rob Clark <robdclark@chromium.org>,
linux-clk@vger.kernel.org, Srinivas Kandagatla <srini@kernel.org>,
Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Subject: Re: [PATCH v5 21/24] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU
Date: Fri, 23 May 2025 09:55:00 +0300 [thread overview]
Message-ID: <aDAbxAnCN1lGGcGH@linaro.org> (raw)
In-Reply-To: <20250430-b4-sm8750-display-v5-21-8cab30c3e4df@linaro.org>
On 25-04-30 15:00:51, Krzysztof Kozlowski wrote:
> v12.0 DPU on SM8750 comes with 10-bit color alpha. Add register
> differences and new implementations of setup_alpha_out(),
> setup_border_color() and setup_blend_config().
>
> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>
> ---
>
> Changes in v4:
> 1. Lowercase hex, use spaces for define indentation
> 2. _dpu_crtc_setup_blend_cfg(): pass mdss_ver instead of ctl
>
> Changes in v3:
> 1. New patch, split from previous big DPU v12.0.
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 19 ++++---
> drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 84 +++++++++++++++++++++++++++++--
> 2 files changed, 94 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> index a4b0fe0d9899b32141928f0b6a16503a49b3c27a..90f47fc15ee5708795701d78a1380f4ab01c1427 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
> @@ -320,14 +320,20 @@ static bool dpu_crtc_get_scanout_position(struct drm_crtc *crtc,
> }
>
> static void _dpu_crtc_setup_blend_cfg(struct dpu_crtc_mixer *mixer,
> - struct dpu_plane_state *pstate, const struct msm_format *format)
> + struct dpu_plane_state *pstate,
> + const struct msm_format *format,
> + const struct dpu_mdss_version *mdss_ver)
> {
> struct dpu_hw_mixer *lm = mixer->hw_lm;
> uint32_t blend_op;
> - uint32_t fg_alpha, bg_alpha;
> + uint32_t fg_alpha, bg_alpha, max_alpha;
>
> fg_alpha = pstate->base.alpha >> 8;
For the 10-bit alpha, you need to shift here by 5 instead of 8.
next prev parent reply other threads:[~2025-05-23 6:55 UTC|newest]
Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-30 13:00 [PATCH v5 00/24] drm/msm: Add support for SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 01/24] dt-bindings: display/msm: dsi-phy-7nm: Add SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 02/24] dt-bindings: display/msm: dsi-controller-main: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 03/24] dt-bindings: display/msm: dp-controller: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 04/24] dt-bindings: display/msm: qcom,sm8650-dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 05/24] dt-bindings: display/msm: qcom,sm8750-mdss: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 06/24] clk: qcom: dispcc-sm8750: Fix setting rate byte and pixel clocks Krzysztof Kozlowski
2025-05-02 22:42 ` Dmitry Baryshkov
2025-05-05 6:15 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 07/24] drm/msm/dpu: Add missing "fetch" name to set_active_pipes() Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 08/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on mixer reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 09/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE on ctl_path reset Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 10/24] drm/msm/dpu: Clear CTL_FETCH_PIPE_ACTIVE before blend setup Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 11/24] drm/msm/dpu: Drop useless comments Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 12/24] drm/msm/dpu: Add LM_7, DSC_[67], PP_[67] and MERGE_3D_5 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 13/24] drm/msm/dpu: Add handling of LM_6 and LM_7 bits in pending flush mask Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 14/24] drm/msm/dsi/phy: Toggle back buffer resync after preparing PLL Krzysztof Kozlowski
2025-05-02 22:43 ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 15/24] drm/msm/dsi/phy: Define PHY_CMN_CTRL_0 bitfields Krzysztof Kozlowski
2025-05-02 22:44 ` Dmitry Baryshkov
2025-05-05 6:17 ` Krzysztof Kozlowski
2025-05-05 14:14 ` Dmitry Baryshkov
2025-05-20 10:57 ` Krzysztof Kozlowski
2025-05-20 21:23 ` Dmitry Baryshkov
2025-05-21 6:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 16/24] drm/msm/dsi/phy: Fix reading zero as PLL rates when unprepared Krzysztof Kozlowski
2025-04-30 13:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 17/24] drm/msm/dsi/phy: Fix missing initial VCO rate Krzysztof Kozlowski
2025-05-02 22:48 ` Dmitry Baryshkov
2025-04-30 13:00 ` [PATCH v5 18/24] drm/msm/dsi/phy: Add support for SM8750 Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 19/24] drm/msm/dsi: " Krzysztof Kozlowski
2025-05-02 22:52 ` Dmitry Baryshkov
2025-05-05 6:45 ` Krzysztof Kozlowski
2025-05-05 12:26 ` Dmitry Baryshkov
2025-05-05 12:35 ` Dmitry Baryshkov
2025-05-05 21:28 ` Abhinav Kumar
2025-05-19 15:11 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 20/24] drm/msm/dpu: " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 21/24] drm/msm/dpu: Implement 10-bit color alpha for v12.0 DPU Krzysztof Kozlowski
2025-05-05 12:24 ` Dmitry Baryshkov
2025-05-19 16:49 ` Abhinav Kumar
2025-05-19 16:53 ` Dmitry Baryshkov
2025-05-23 6:55 ` Abel Vesa [this message]
2025-05-23 7:02 ` Abel Vesa
2025-05-23 8:29 ` Dmitry Baryshkov
2025-05-23 9:50 ` Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 22/24] drm/msm/dpu: Implement CTL_PIPE_ACTIVE " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 23/24] drm/msm/dpu: Implement LM crossbar " Krzysztof Kozlowski
2025-04-30 13:00 ` [PATCH v5 24/24] drm/msm/mdss: Add support for SM8750 Krzysztof Kozlowski
2025-05-17 0:08 ` [PATCH v5 00/24] drm/msm: " Jessica Zhang
2025-05-19 14:52 ` Krzysztof Kozlowski
2025-05-19 15:07 ` Dmitry Baryshkov
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