From: Johan Hovold <johan@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Sibi Sankar <quic_sibis@quicinc.com>,
Rajendra Nayak <quic_rjendra@quicinc.com>,
Abel Vesa <abel.vesa@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Subject: Re: [PATCH] arm64: dts: qcom: x1e80100: Add interconnect to primary USB3 controller
Date: Wed, 28 May 2025 10:51:08 +0200 [thread overview]
Message-ID: <aDbOfKl3uiBYfBlp@hovoldconsulting.com> (raw)
In-Reply-To: <20250527-topic-x1e_usb_icc-v1-1-43b604cb0609@oss.qualcomm.com>
On Tue, May 27, 2025 at 09:26:17PM +0200, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
>
> This seems to have been omitted during the initial bringup.
>
> Fixes: 4af46b7bd66f ("arm64: dts: qcom: x1e80100: Add USB nodes")
> Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
NAK
This breaks suspend as I've mentioned multiple times in our meetings.
IIUC, this may even have been the reason why it was not included in the
first place.
Specifically, adding this interconnect triggers a reset by the
hypervisor on resume, presumably as something is not described properly
and depends on a vote not going away.
I have not had time to track it down, and I have even less time now, but
since you have access to the internal Qualcomm tools you may be able to
make some progress on this (e.g. by capturing and analysing a
crashdump).
Johan
prev parent reply other threads:[~2025-05-28 8:51 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-27 19:26 [PATCH] arm64: dts: qcom: x1e80100: Add interconnect to primary USB3 controller Konrad Dybcio
2025-05-27 20:00 ` Dmitry Baryshkov
2025-05-28 7:44 ` Abel Vesa
2025-05-28 8:51 ` Johan Hovold [this message]
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