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[97.120.245.201]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7482af3835fsm7775456b3a.27.2025.06.10.11.14.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 10 Jun 2025 11:14:07 -0700 (PDT) Date: Tue, 10 Jun 2025 11:14:05 -0700 From: Drew Fustini To: Rob Herring Cc: Dan Williams , Vishal Verma , Dave Jiang , nvdimm@lists.linux.dev, Oliver O'Halloran , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Conor Dooley Subject: Re: [PATCH v3] dt-bindings: pmem: Convert binding to YAML Message-ID: References: <20250606184405.359812-4-drew@pdp7.com> <20250609133241.GA1855507-robh@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250609133241.GA1855507-robh@kernel.org> On Mon, Jun 09, 2025 at 08:32:41AM -0500, Rob Herring wrote: > On Fri, Jun 06, 2025 at 11:11:17AM -0700, Drew Fustini wrote: > > Convert the PMEM device tree binding from text to YAML. This will allow > > device trees with pmem-region nodes to pass dtbs_check. > > > > Acked-by: Conor Dooley > > Acked-by: Oliver O'Halloran > > Signed-off-by: Drew Fustini > > --- > > Dan/Dave/Vishal: does it make sense for this pmem binding patch to go > > through the nvdimm tree? > > > > Note: checkpatch complains about "DT binding docs and includes should > > be a separate patch". Rob told me that this a false positive. I'm hoping > > that I can fix the false positive at some point if I can remember enough > > perl :) > > > > v3: > > - no functional changes > > - add Oliver's Acked-by > > - bump version to avoid duplicate message-id mess in v2 and v2 resend: > > https://lore.kernel.org/all/20250520021440.24324-1-drew@pdp7.com/ > > > > v2 resend: > > - actually put v2 in the Subject > > - add Conor's Acked-by > > - https://lore.kernel.org/all/20250520-refract-fling-d064e11ddbdf@spud/ > > > > v2: > > - remove the txt file to make the conversion complete > > - https://lore.kernel.org/all/20250520021440.24324-1-drew@pdp7.com/ > > > > v1: > > - https://lore.kernel.org/all/20250518035539.7961-1-drew@pdp7.com/ > > > > .../devicetree/bindings/pmem/pmem-region.txt | 65 ------------------- > > .../devicetree/bindings/pmem/pmem-region.yaml | 49 ++++++++++++++ > > MAINTAINERS | 2 +- > > 3 files changed, 50 insertions(+), 66 deletions(-) > > delete mode 100644 Documentation/devicetree/bindings/pmem/pmem-region.txt > > create mode 100644 Documentation/devicetree/bindings/pmem/pmem-region.yaml > > > > diff --git a/Documentation/devicetree/bindings/pmem/pmem-region.txt b/Documentation/devicetree/bindings/pmem/pmem-region.txt > > deleted file mode 100644 > > index cd79975e85ec..000000000000 > > --- a/Documentation/devicetree/bindings/pmem/pmem-region.txt > > +++ /dev/null > > @@ -1,65 +0,0 @@ > > -Device-tree bindings for persistent memory regions > > ------------------------------------------------------ > > - > > -Persistent memory refers to a class of memory devices that are: > > - > > - a) Usable as main system memory (i.e. cacheable), and > > - b) Retain their contents across power failure. > > - > > -Given b) it is best to think of persistent memory as a kind of memory mapped > > -storage device. To ensure data integrity the operating system needs to manage > > -persistent regions separately to the normal memory pool. To aid with that this > > -binding provides a standardised interface for discovering where persistent > > -memory regions exist inside the physical address space. > > - > > -Bindings for the region nodes: > > ------------------------------ > > - > > -Required properties: > > - - compatible = "pmem-region" > > - > > - - reg = ; > > - The reg property should specify an address range that is > > - translatable to a system physical address range. This address > > - range should be mappable as normal system memory would be > > - (i.e cacheable). > > - > > - If the reg property contains multiple address ranges > > - each address range will be treated as though it was specified > > - in a separate device node. Having multiple address ranges in a > > - node implies no special relationship between the two ranges. > > - > > -Optional properties: > > - - Any relevant NUMA associativity properties for the target platform. > > - > > - - volatile; This property indicates that this region is actually > > - backed by non-persistent memory. This lets the OS know that it > > - may skip the cache flushes required to ensure data is made > > - persistent after a write. > > - > > - If this property is absent then the OS must assume that the region > > - is backed by non-volatile memory. > > - > > -Examples: > > --------------------- > > - > > - /* > > - * This node specifies one 4KB region spanning from > > - * 0x5000 to 0x5fff that is backed by non-volatile memory. > > - */ > > - pmem@5000 { > > - compatible = "pmem-region"; > > - reg = <0x00005000 0x00001000>; > > - }; > > - > > - /* > > - * This node specifies two 4KB regions that are backed by > > - * volatile (normal) memory. > > - */ > > - pmem@6000 { > > - compatible = "pmem-region"; > > - reg = < 0x00006000 0x00001000 > > - 0x00008000 0x00001000 >; > > - volatile; > > - }; > > - > > diff --git a/Documentation/devicetree/bindings/pmem/pmem-region.yaml b/Documentation/devicetree/bindings/pmem/pmem-region.yaml > > new file mode 100644 > > index 000000000000..a4aa4ce3318b > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pmem/pmem-region.yaml > > @@ -0,0 +1,49 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/pmem-region.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +maintainers: > > + - Bjorn Helgaas > > Drop Bjorn. He only did typo fixes on this. > > > + - Oliver O'Halloran > > + > > +title: Persistent Memory Regions > > + > > +description: | > > + Persistent memory refers to a class of memory devices that are: > > + > > + a) Usable as main system memory (i.e. cacheable), and > > + b) Retain their contents across power failure. > > + > > + Given b) it is best to think of persistent memory as a kind of memory mapped > > + storage device. To ensure data integrity the operating system needs to manage > > + persistent regions separately to the normal memory pool. To aid with that this > > + binding provides a standardised interface for discovering where persistent > > + memory regions exist inside the physical address space. > > + > > +properties: > > + compatible: > > + const: pmem-region > > + > > + reg: > > + maxItems: 1 > > + > > + volatile: > > + description: | > > Don't need '|' here. Rob - Thanks for the feedback. Should I send a new revision with these two changes? Drew