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[34.126.98.232]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b31886377a6sm5271665a12.71.2025.06.16.14.32.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 16 Jun 2025 14:32:48 -0700 (PDT) Date: Mon, 16 Jun 2025 21:32:40 +0000 From: Pranjal Shrivastava To: Xueqi Zhang Cc: Yong Wu , Will Deacon , Robin Murphy , Joerg Roedel , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Project_Global_Chrome_Upstream_Group@mediatek.com, Ning li , linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, iommu@lists.linux.dev Subject: Re: [RFC PATCH 5/8] iommu/arm-smmu-v3: Add IRQ handle for smmu impl Message-ID: References: <20250616025628.25454-1-xueqi.zhang@mediatek.com> <20250616025628.25454-6-xueqi.zhang@mediatek.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250616025628.25454-6-xueqi.zhang@mediatek.com> On Mon, Jun 16, 2025 at 10:56:11AM +0800, Xueqi Zhang wrote: > Add IRQ handle for smmu impl > > Signed-off-by: Xueqi Zhang > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 9 ++++++++- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 8 ++++++++ > 2 files changed, 16 insertions(+), 1 deletion(-) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index d36124a6bb54..154417b380fa 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -1954,7 +1954,8 @@ static irqreturn_t arm_smmu_evtq_thread(int irq, void *dev) > arm_smmu_decode_event(smmu, evt, &event); > if (arm_smmu_handle_event(smmu, evt, &event)) > arm_smmu_dump_event(smmu, evt, &event, &rs); > - > + if (smmu->impl && smmu->impl->smmu_evt_handler) > + smmu->impl->smmu_evt_handler(irq, smmu, evt, &rs); > put_device(event.dev); > cond_resched(); > } > @@ -2091,7 +2092,13 @@ static irqreturn_t arm_smmu_combined_irq_thread(int irq, void *dev) > > static irqreturn_t arm_smmu_combined_irq_handler(int irq, void *dev) > { > + struct arm_smmu_device *smmu = dev; > + > arm_smmu_gerror_handler(irq, dev); > + > + if (smmu->impl && smmu->impl->combined_irq_handle) > + smmu->impl->combined_irq_handle(irq, smmu); > + > return IRQ_WAKE_THREAD; > } > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index 99eeb6143c49..f45c4bf84bc1 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -792,6 +792,7 @@ struct arm_smmu_device { > > struct rb_root streams; > struct mutex streams_mutex; > + const struct arm_smmu_v3_impl *impl; > }; > > struct arm_smmu_stream { > @@ -998,6 +999,13 @@ int arm_smmu_cmdq_issue_cmdlist(struct arm_smmu_device *smmu, > struct arm_smmu_cmdq *cmdq, u64 *cmds, int n, > bool sync); > > +/* Implementation details */ > +struct arm_smmu_v3_impl { > + int (*combined_irq_handle)(int irq, struct arm_smmu_device *smmu_dev); > + int (*smmu_evt_handler)(int irq, struct arm_smmu_device *smmu_dev, > + u64 *evt, struct ratelimit_state *rs); > +}; Let's add these to the exisiting struct arm_smmu_impl_ops and invoke them like: if (smmu->impl && smmu->impl_ops->combined_irq_handle) smmu->impl_ops->combined_irq_handle(irq, smmu); Or maybe we could merge the existing impl_dev and impl_ops into a single structure. > + > struct arm_smmu_device *arm_smmu_v3_impl_init(struct arm_smmu_device *smmu); > #if IS_ENABLED(CONFIG_ARM_SMMU_V3_MEDIATEK) > struct arm_smmu_device *arm_smmu_v3_impl_mtk_init(struct arm_smmu_device *smmu); > -- > 2.46.0 > >