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Tue, 17 Jun 2025 11:52:19 -0700 (PDT) Received: from localhost ([2804:30c:4000:5900:b4c4:6073:1a92:4077]) by smtp.gmail.com with UTF8SMTPSA id d9443c01a7336-2365e0d0ab2sm84238655ad.246.2025.06.17.11.52.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 Jun 2025 11:52:17 -0700 (PDT) Date: Tue, 17 Jun 2025 15:54:06 -0300 From: Marcelo Schmitt To: David Lechner Cc: Marcelo Schmitt , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Ana-Maria Cusco , jic23@kernel.org, lars@metafoo.de, Michael.Hennerich@analog.com, nuno.sa@analog.com, andy@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linus.walleij@linaro.org, brgl@bgdev.pl Subject: Re: [PATCH v5 02/11] iio: adc: Add basic support for AD4170 Message-ID: References: <48598c0753cccf515addbe85acba3f883ff8f036.1749582679.git.marcelo.schmitt@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: On 06/16, David Lechner wrote: > On 6/10/25 3:31 PM, Marcelo Schmitt wrote: > > From: Ana-Maria Cusco > > > > The AD4170 is a multichannel, low noise, 24-bit precision sigma-delta > > analog to digital converter. The AD4170 design offers a flexible data > > acquisition solution with crosspoint multiplexed analog inputs, > > configurable ADC voltage reference inputs, ultra-low noise integrated PGA, > > digital filtering, wide range of configurable output data rates, internal > > oscillator and temperature sensor, four GPIOs, and integrated features for > > interfacing with load cell weigh scales, RTD, and thermocouple sensors. > > > > Add basic support for the AD4170 ADC with the following features: > > - Single-shot read. > > - Analog front end PGA configuration. > > - Differential and pseudo-differential input configuration. > > > > ... > > > +static int ad4170_fill_scale_tbl(struct iio_dev *indio_dev, > > + struct iio_chan_spec const *chan) > > +{ > > + struct ad4170_state *st = iio_priv(indio_dev); > > + struct ad4170_chan_info *chan_info = &st->chan_infos[chan->address]; > > + struct device *dev = &st->spi->dev; > > + int bipolar = chan->scan_type.sign == 's' ? 1 : 0; > > + int precision_bits = chan->scan_type.realbits; > > + int pga, ainm_voltage, ret; > > + unsigned long long offset; > > + > > + ainm_voltage = 0; > > + ret = ad4170_get_ain_voltage_uv(st, chan->channel2, &ainm_voltage); > > + if (ret < 0) > > + return dev_err_probe(dev, ret, "Failed to fill scale table\n"); > > + > > + for (pga = 0; pga < AD4170_NUM_PGA_OPTIONS; pga++) { > > From what I read in the datasheet, it sounds like if adi,reference-buffer is > precharge, then the PGA is bypassed, so there would only be 1 option in that > case (gain = 1). > Although not explicit in the datasheet, looks like there are two precharge buffers. One precharge buffer is used with the voltage reference inputs and is associated with the adi,positive/negative-reference-buffer dt properties. The configuration of that buffer is set through the REF_BUF_P/M fields of AFE registers. The datasheet doesn't mention the PGA on the section dedicated to describing reference and reference buffering features. The other places a precharge buffer is mentioned refer to it as 'gain = 1 precharge'. My understanding is that the PGA bypass precharge buffer is a different buffer that is only used when PGA option 9 is set in the PGA_GAIN filed of AFE reg. The PGA bypass precharge buffer would be used in the analog input path while the reference buffers would be used in the reference input path.