From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7592022068D; Mon, 30 Jun 2025 20:52:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751316770; cv=none; b=ULhSMpoORfw69UwS0Ta2nEggbIYuYY3q48+m7ZTqn6gdI2SiurhXnC8NTN4s4v0UETiKfysCBnNJBwx9dHXkERvdrSeGkSSMkFz0eVko4tSsSPaerJE31TyqWtiribpJPTVPU2OiaUZ4IWQHXamIY9ylfVFujFZGfocYdd0Pscc= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1751316770; c=relaxed/simple; bh=HxNS8mhOfCb2u6BZlip3RJTcxTguswhUtDe5juU/JBM=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=TuU8/iIYP5ljAmPR2tmX0mWv4ih0WsNrz/25ePPPJ4gVHKKZSPffolsmBDYks5DWe5hEnK7FQo2lgJ+rzNw+WhOybaCJPIg9tXbwp1pB8eDFx3IlrmJqdTSLkxvfqEZo1H37/8xilCEO91P0Yq5d+1r64gwLrt4D9FKeBfIUeqQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=miH6P3n5; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="miH6P3n5" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9A063C4CEE3; Mon, 30 Jun 2025 20:52:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1751316770; bh=HxNS8mhOfCb2u6BZlip3RJTcxTguswhUtDe5juU/JBM=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=miH6P3n5QAkKFfbrZCDoFYqmhti01pJkS6lvdQerD1SnIftpFt/Qf/xe7XbAoFGlg EjJqkwhJWK2x5MmXkwFLgNxI+VC1v3BfmWHz1aY+sFVcw0J6DtJ4RMRXuauuedNK+I 1KbuO53vw1Nx0Ubl0xUWpAynhUCcglsRdTSBwMyZyXGCJc8/j4GJ2qS1CLFWyVbuPR wQWkRqUzkd126bIx4FdFve76YSEhhMi28G8F/43AycBB551pfKinVpjyVlX1/EU48J tYQcgJCtEYl/pqDmc5jdKGZAi7yOFC2VO3pnc3aJgpEf0cnF1JuGRqSJZgOcDg1LHI Mh7Eoj/UXwT2Q== Date: Mon, 30 Jun 2025 13:52:48 -0700 From: Drew Fustini To: Michal Wilczynski Cc: Guo Ren , Fu Wei , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Philipp Zabel , Frank Binns , Matt Coster , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , David Airlie , Simona Vetter , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Ulf Hansson , Marek Szyprowski , linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, dri-devel@lists.freedesktop.org, Bartosz Golaszewski Subject: Re: [PATCH v7 3/5] riscv: dts: thead: th1520: Add GPU clkgen reset to AON node Message-ID: References: <20250626-apr_14_for_sending-v7-0-6593722e0217@samsung.com> <20250626-apr_14_for_sending-v7-3-6593722e0217@samsung.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250626-apr_14_for_sending-v7-3-6593722e0217@samsung.com> On Thu, Jun 26, 2025 at 11:33:48AM +0200, Michal Wilczynski wrote: > Add the "gpu-clkgen" reset property to the AON device tree node. This > allows the AON power domain driver to detect the capability to power > sequence the GPU and spawn the necessary pwrseq-thead-gpu auxiliary > driver for managing the GPU's complex power sequence. > > This commit also adds the prerequisite > dt-bindings/reset/thead,th1520-reset.h include to make the > TH1520_RESET_ID_GPU_CLKGEN available. This include was previously > dropped during a conflict resolution [1]. > > Link: https://lore.kernel.org/all/aAvfn2mq0Ksi8DF2@x1/ [1] > > Reviewed-by: Ulf Hansson > Reviewed-by: Bartosz Golaszewski > Reviewed-by: Drew Fustini > Signed-off-by: Michal Wilczynski > --- > arch/riscv/boot/dts/thead/th1520.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi > index 1db0054c4e093400e9dbebcee5fcfa5b5cae6e32..f3f5db0201ab8c0306d4d63072a1573431e51893 100644 > --- a/arch/riscv/boot/dts/thead/th1520.dtsi > +++ b/arch/riscv/boot/dts/thead/th1520.dtsi > @@ -7,6 +7,7 @@ > #include > #include > #include > +#include > > / { > compatible = "thead,th1520"; > @@ -234,6 +235,8 @@ aon: aon { > compatible = "thead,th1520-aon"; > mboxes = <&mbox_910t 1>; > mbox-names = "aon"; > + resets = <&rst TH1520_RESET_ID_GPU_CLKGEN>; > + reset-names = "gpu-clkgen"; > #power-domain-cells = <1>; > }; > > > -- > 2.34.1 > I have applied this patch to thead-dt-for-next [1] as commit cf5e81d [2]. Thanks, Drew [1] https://github.com/pdp7/linux/commits/thead-dt-for-next/ [2] https://github.com/pdp7/linux/commit/cf5e81da0ed7f548367a9687ad73956a8dfb54d1