Re: [PATCH 5/5] ARM: dts: aspeed: Add Facebook Darwin (AST2600) BMC

Tao Ren
2025-07-02T23:09:45Z

On Wed, Jul 02, 2025 at 09:40:40AM +0200, Andrew Lunn wrote:
> On Tue, Jul 01, 2025 at 10:04:16PM -0700, rentao.bupt@gmail.com wrote:
> > From: Tao Ren <rentao.bupt@gmail.com>
> >
> > Add initial device tree for the Meta (Facebook) Darwin AST2600 BMC.
> >
> > Darwin is Meta's rack switch platform with an AST2600 BMC integrated for
> > health monitoring purpose.
> >
> > Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
> > ---
> > arch/arm/boot/dts/aspeed/Makefile | 1 +
> > .../dts/aspeed/aspeed-bmc-facebook-darwin.dts | 92 +++++++++++++++++++
> > 2 files changed, 93 insertions(+)
> > create mode 100644 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts
> >
> > diff --git a/arch/arm/boot/dts/aspeed/Makefile b/arch/arm/boot/dts/aspeed/Makefile
> > index 2e5f4833a073..debbfc0151f8 100644
> > --- a/arch/arm/boot/dts/aspeed/Makefile
> > +++ b/arch/arm/boot/dts/aspeed/Makefile
> > @@ -20,6 +20,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> > aspeed-bmc-facebook-bletchley.dtb \
> > aspeed-bmc-facebook-catalina.dtb \
> > aspeed-bmc-facebook-cmm.dtb \
> > + aspeed-bmc-facebook-darwin.dtb \
> > aspeed-bmc-facebook-elbert.dtb \
> > aspeed-bmc-facebook-fuji.dtb \
> > aspeed-bmc-facebook-galaxy100.dtb \
> > diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts
> > new file mode 100644
> > index 000000000000..f902230dada3
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-darwin.dts
> > @@ -0,0 +1,92 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +// Copyright (c) 2021 Facebook Inc.
> > +
> > +/dts-v1/;
> > +
> > +#include "ast2600-facebook-netbmc-common.dtsi"
> > +
> > +/ {
> > + model = "Facebook Darwin BMC";
> > + compatible = "facebook,darwin-bmc", "aspeed,ast2600";
> > +
> > + aliases {
> > + serial0 = &uart5;
> > + serial1 = &uart1;
> > + serial2 = &uart2;
> > + serial3 = &uart3;
> > + };
> > +
> > + chosen {
> > + stdout-path = &uart5;
> > + };
> > +
> > + iio-hwmon {
> > + compatible = "iio-hwmon";
> > + io-channels = <&adc0 0>, <&adc0 1>, <&adc0 2>, <&adc0 3>,
> > + <&adc0 4>, <&adc0 5>, <&adc0 6>, <&adc0 7>,
> > + <&adc1 0>, <&adc1 1>, <&adc1 2>, <&adc1 3>,
> > + <&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
> > + };
> > +
> > + spi_gpio: spi {
> > + num-chipselects = <1>;
> > + cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
> > + };
> > +};
> > +
> > +/*
> > + * BMC's "mac3" controller is connected to BCM53134P's IMP_RGMII port
> > + * directly (fixed link, no PHY in between).
> > + * Note: BMC's "mdio0" controller is connected to BCM53134P's MDIO
> > + * interface, and the MDIO channel will be enabled in dts later (when
> > + * "bcm53xx" driver's probe failure is solved on the platform).
> > + */
> > +&mac3 {
> > + status = "okay";
> > + phy-mode = "rgmii";
>
> How do RGMII delays work? Connections to switches have to be handled
> different to PHYs, to avoid double delays. But is there extra long
> clock lines? Or are you expecting the switch to add the delays?
>
> Andrew

Hi Andrew,

The delays are introduced in BMC MAC by setting SCU control registers in
u-boot. The delays on the switch side are disabled.

I will add some comments for the delays in v2 (after addressing the dts
schema warnings). Is that okay?

Thanks,

Tao