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Thu, 03 Jul 2025 08:10:37 -0700 (PDT) Date: Thu, 3 Jul 2025 18:10:35 +0300 From: Abel Vesa To: Peng Fan Cc: Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Abel Vesa , Frank Li , linux-clk@vger.kernel.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 4/5] clk: imx95-blk-ctl: Add clock for i.MX94 LVDS/Display CSR Message-ID: References: <20250703-imx95-blk-ctl-7-1-v2-0-b378ad796330@nxp.com> <20250703-imx95-blk-ctl-7-1-v2-4-b378ad796330@nxp.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250703-imx95-blk-ctl-7-1-v2-4-b378ad796330@nxp.com> On 25-07-03 11:40:23, Peng Fan wrote: > i.MX94 BLK CTL LVDS CSR's LVDS_PHY_CLOCK_CONTRL register controls the clock > gating logic of LVDS units. Display CSR's DISPLAY_ENGINES_CLOCK_CONTROL > register controls the selection of the clock feeding the display engine. > > Add clock gate support for the two CSRs. > > While at here, reorder imx95_bc_of_match. > > Signed-off-by: Peng Fan Reviewed-by: Abel Vesa