From: Guomin chen <guomin.chen@cixtech.com>
To: Jassi Brar <jassisinghbrar@gmail.com>, Arnd Bergmann <arnd@arndb.de>
Cc: Peter Chen <peter.chen@cixtech.com>,
Rob Herring <robh@kernel.org>,
krzk+dt@kernel.org, Conor Dooley <conor+dt@kernel.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, cix-kernel-upstream@cixtech.com,
Marc Zyngier <maz@kernel.org>,
Sudeep Holla <sudeep.holla@arm.com>,
Kajetan Puchalski <kajetan.puchalski@arm.com>,
Enric Balletbo <eballetb@redhat.com>,
Guomin Chen <Guomin.Chen@cixtech.com>,
Gary Yang <gary.yang@cixtech.com>,
Lihua Liu <Lihua.Liu@cixtech.com>
Subject: Re: [PATCH v9 5/9] mailbox: add CIX mailbox driver
Date: Tue, 8 Jul 2025 09:51:53 +0000 [thread overview]
Message-ID: <aGzqOTHE0equy6m3@gchen> (raw)
In-Reply-To: <CABb+yY1pzut-A9Xf117AoGMze2OevWKYrH5NtWBGFBhAMZky+A@mail.gmail.com>
On Fri, Jul 04, 2025 at 01:35:51PM -0500, Jassi Brar wrote:
> [Some people who received this message don't often get email from jassisinghbrar@gmail.com. Learn why this is important at https://aka.ms/LearnAboutSenderIdentification ]
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>
> On Fri, Jul 4, 2025 at 11:05 AM Arnd Bergmann <arnd@arndb.de> wrote:
> >
> > On Mon, Jun 9, 2025, at 05:16, Peter Chen wrote:
> > > From: Guomin Chen <Guomin.Chen@cixtech.com>
> > >
> > > The CIX mailbox controller, used in the Cix SoCs, like sky1.
> > > facilitates message transmission between multiple processors
> > > within the SoC, such as the AP, PM, audio DSP, SensorHub MCU,
> > > and others.
> > >
> > > Reviewed-by: Peter Chen <peter.chen@cixtech.com>
> > > Signed-off-by: Guomin Chen <Guomin.Chen@cixtech.com>
> > > Signed-off-by: Gary Yang <gary.yang@cixtech.com>
> > > Signed-off-by: Lihua Liu <Lihua.Liu@cixtech.com>
> > > Signed-off-by: Peter Chen <peter.chen@cixtech.com>
> >
> > This is the only driver holding up the merge of the CIX
> > platform, so I had a closer look myself.
> >
> Sorry I wasn't made aware of this. Also I normally let the drivers
> roast until second half
> hoping other platform folks find issues - I have reduced imposing my
> opinions on platform
> specific code because it is usually met with some sledge-hammer requirement.
>
> >
> > The one thing that stuck out to me is the design of
> > having multiple types of mailbox in one driver, which
> > feels out of scope for a simple mailbox.
> >
> Yes, if not all modes are used currently, maybe drop unused ones.
>
Hi Jassi Brar & Arnd Bergmann
Many thanks to both of you for your responses.
In the CIX platform, each mailbox controller is equipped with 11 channels,
categorized into four communication types: Doorbell, REG, FIFO, and FAST.
The Doorbell/REG transfer modes are used for the SCMI framework,
while the FIFO transfer mode is used for the remoteproc/rpmsg framework.
Currently, there are no clients using the FAST mode, but there may be in the future.
In the CIX Sky1 SoC, there are 4 pairs of mailbox controllers (since each
mailbox controller is unidirectional, 2 mailbox controllers are required
to establish a single bidirectional communication link, one for receiving
and one for transmitting):
AP <--> PM (using Doorbell transfer mode),
AP <--> SE (using REG transfer mode),
AP <--> DSP (using FIFO transfer mode),
AP <--> SensorHub (using FIFO transfer mode).
Since this patchset is only a minimal system that includes only the necessary
subsystems for booting, it contains only the SCMI clock client using Doorbell
mode. Other clients using different transfer modes are not included in this
patchset, but they will be added later.
Supporting multiple types of transfer modes is a feature of this driver
that leverages the hardware capabilities. We are not the only ones with
a relatively complex mailbox design; for example, the NXP mailbox driver
also supports multiple types of transfer modes.
Thanks
Guomin Chen
>
> Thanks.
next prev parent reply other threads:[~2025-07-08 9:52 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-09 3:16 [PATCH v9 0/9] arm64: Introduce CIX P1 (SKY1) SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 1/9] dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd Peter Chen
2025-06-09 3:16 ` [PATCH v9 2/9] dt-bindings: arm: add CIX P1 (SKY1) SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 3/9] arm64: Kconfig: add ARCH_CIX for cix silicons Peter Chen
2025-06-09 3:16 ` [PATCH v9 4/9] dt-bindings: mailbox: add cix,sky1-mbox Peter Chen
2025-06-09 3:16 ` [PATCH v9 5/9] mailbox: add CIX mailbox driver Peter Chen
2025-07-02 1:08 ` Peter Chen
2025-07-04 16:04 ` Arnd Bergmann
2025-07-04 18:35 ` Jassi Brar
2025-07-08 9:51 ` Guomin chen [this message]
2025-07-06 19:30 ` Jassi Brar
2025-07-08 13:53 ` Guomin chen
2025-07-13 17:00 ` Jassi Brar
2025-07-14 12:43 ` Guomin chen
2025-07-14 15:39 ` Arnd Bergmann
2025-07-15 22:11 ` Jassi Brar
2025-07-16 2:28 ` Guomin chen
2025-07-16 7:19 ` Arnd Bergmann
2025-07-16 17:15 ` Jassi Brar
2025-06-09 3:16 ` [PATCH v9 6/9] arm64: defconfig: Enable CIX SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 7/9] dt-bindings: clock: cix: Add CIX sky1 scmi clock id Peter Chen
2025-06-09 3:16 ` [PATCH v9 8/9] arm64: dts: cix: Add sky1 base dts initial support Peter Chen
2025-07-05 8:20 ` Krzysztof Kozlowski
2025-07-07 2:50 ` Peter Chen
2025-06-09 3:16 ` [PATCH v9 9/9] MAINTAINERS: Add CIX SoC maintainer entry Peter Chen
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