From: Andrea della Porta <andrea.porta@suse.com>
To: Andrea della Porta <andrea.porta@suse.com>
Cc: linus.walleij@linaro.org, robh@kernel.org, krzk+dt@kernel.org,
conor+dt@kernel.org, florian.fainelli@broadcom.com,
wahrenst@gmx.net, linux-gpio@vger.kernel.org,
devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
iivanov@suse.de, svarbanov@suse.de, mbrugger@suse.com
Subject: Re: [PATCH 0/7] Add pin control driver for BCM2712 SoC
Date: Tue, 22 Jul 2025 12:02:01 +0200 [thread overview]
Message-ID: <aH9hmVA2cEJipYiU@apocalypse> (raw)
In-Reply-To: <cover.1752584387.git.andrea.porta@suse.com>
On 20:31 Tue 15 Jul , Andrea della Porta wrote:
> Hi,
>
> The following patches add a pin control driver for the BCM2712 SoC and few
> pin/gpio Devicetree nodes for Raspberry Pi 5.
>
> Device driver is follow up version on what Andrea posted in April [1].
>
> It is based on sources from here [2]. I just made few cosmetic changes
> and addressed review comments from earlier submission. I don't have
> documentation for this controller.
>
> Patch 4 wire up power button on RPi5.
>
> Patch 5 adds WiFi Devicetree node for RPi5.
>
> Patch 6 adds Bluetooth Devicetree node for RPi5.
>
> All this have been tested as kernel was directly booted RPi5 via
> kernel= config.txt option and cmdline.txt file with following content
> (Note I am using Tumbleweed RPi raw images)
>
> # cat /boot/efi/cmdline.txt
> root=/dev/mmcblk0p3 rootwait rw systemd.show_status=1 console=tty ignore_loglevel earlycon console=ttyAMA10,115200
>
> With all these patches Bluetooth and Wifi are working fine (tm) with
> firmware files provided by openSUSE Tumbleweed.
>
> All comments and suggestions are welcome!
>
> Happy hacking!
> Ivan and Andrea
>
> [1] https://lore.kernel.org/lkml/f6601f73-cb22-4ba3-88c5-241be8421fc3@broadcom.com/
> [2] https://github.com/raspberrypi/linux/blob/rpi-6.6.y/drivers/pinctrl/bcm/pinctrl-bcm2712.c
> [3] https://lore.kernel.org/lkml/20240605120712.3523290-1-florian.fainelli@broadcom.com/#t
> [4] https://lore.kernel.org/all/bfc60a7e-54d2-48a6-a288-4fe76d66507a@gmx.net/
>
>
> CHANGES in V2: (all patchset is based upon linux-next/master)
Sorry, I've just realized this patchset has been sent with no V2 in the subject.
Anyway, I'm preparing a new revision (which will be V3) after amending it after
Rob's automated script warning.
I'll also split the patchset into two, oen with binding / driver for SoC pin
controller and another with thie remaining DTS related patches.
Many thanks,
Andrea
>
> --- PINCTRL DRIVER ---
>
> - dropped bcm2712_c0_aon_sgpio_pin_funcs[] and bcm2712_d0_aon_sgpio_pin_funcs[]
> struct array definitions since they are not used anywhere.
>
> - dropped 'arg' variable in brcmstb_pinconf_set() as it's not used.
>
> - updated copyright info at the top.
>
> - several changes in the declared macros. Renaming the macro name and the
> macro parameters to better reflect the semantic.
>
> - reworked MUX_BIT() macro to be more streamlined and easy to
> understand.
>
> - added PAD_BIT() macro to avoid code duplication.
>
> - renamed 'lock' variable to 'fsel_lock'.
>
> - added some comments about non-existent pins on D0 silicon revision pin
> declarations.
>
> - brcmstb_pinctrl_fsel_set(), brcmstb_pull_config_set() and
> brcmstb_pinconf_set() (and functions that call them) can now return -EINVAL
> as error.
>
> - added myself as MODULE_AUTHOR.
>
> - dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0
> compatibles are permitted now.
>
>
> --- DTS ---
>
> - moved 'clock-frequency' property from (uarta) board dts node to SoC dtsi node.
>
> - added 'brcm,sdhci-brcmstb' compatible and 'clock-names' property to mmc node
> to avoid dt_binding_check errors.
>
> - added 'brcm,bcm7445-gpio' compatible to gpio node to avoid dt_binding_check
> errors.
>
> - renamed all pinctrl pin nodes as per yaml schema (*-state and *-pins).
>
> - changed 'brcm,bcm2712-*pinctrl' to 'brcm,bcm2712c0-*pinctrl' since the
> former was more of a fallback and does not reflect a real silicon revision.
>
> - moved status="okay" to the last entry in 'uarta' node.
>
> - removed 'local-*-address' property from everywhere.
>
> - dropped 'skip-init' property in 'uarta' node since it does not apply to
> linux kernel.
>
> - renamed 'pwr-button' node to 'gpio-keys' and 'pwr_key' node to
> 'power_button'.
>
> - dropped an userspace related 'brcm,gpio-direct' property from gpio node.
>
>
>
> --- DT BINDINGS ---
>
> - binding schema file renamed to 'brcm,bcm2712c0-pinctrl.yaml' to reflect the
> compatible name.
>
> - dropped the 'brcm,bcm2712-[aon-]pinctrl' fallback compatible. Only c0 or d0
> compatibles are permitted now.
>
> - added example section.
>
> - moved allOf: block at the beginning of the schema.
>
> - dropped some unnecessary new lines.
>
> - replaced current layout to describe the pin subnodes with patternProperties
> (nodes now end with -state and -pins).
>
> - expanded the schema description to give some context about STB family of pin
> controller and added some details about C0 and D0 silicon variants. This is
> also reflected in the commit message.
>
>
> --- MISC ---
>
> - enabled CONFIG_PINCTRL_BRCMSTB in arm64 defconfig.
>
>
> Andrea della Porta (1):
> arm64: defconfig: Enable BCM2712 on-chip pin controller driver
>
> Ivan T. Ivanov (6):
> dt-bindings: pinctrl: Add support for Broadcom STB pin controller
> pinctrl: bcm: Add STB family pin controller driver
> arm64: dts: broadcom: bcm2712: Add pin controller nodes
> arm64: dts: broadcom: bcm2712: Add one more GPIO node
> arm64: dts: broadcom: bcm2712: Add second SDHCI controller node
> arm64: dts: broadcom: bcm2712: Add UARTA controller node
>
> .../pinctrl/brcm,bcm2712c0-pinctrl.yaml | 123 ++
> .../dts/broadcom/bcm2712-rpi-5-b-ovl-rp1.dts | 134 ++
> arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 48 +
> arch/arm64/configs/defconfig | 1 +
> drivers/pinctrl/bcm/Kconfig | 13 +
> drivers/pinctrl/bcm/Makefile | 1 +
> drivers/pinctrl/bcm/pinctrl-brcmstb.c | 1195 +++++++++++++++++
> 7 files changed, 1515 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm2712c0-pinctrl.yaml
> create mode 100644 drivers/pinctrl/bcm/pinctrl-brcmstb.c
>
> --
> 2.35.3
>
next prev parent reply other threads:[~2025-07-22 10:00 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-07-15 18:31 [PATCH 0/7] Add pin control driver for BCM2712 SoC Andrea della Porta
2025-07-15 18:31 ` [PATCH 1/7] dt-bindings: pinctrl: Add support for Broadcom STB pin controller Andrea della Porta
2025-07-15 19:27 ` Rob Herring (Arm)
2025-07-15 18:31 ` [PATCH 2/7] pinctrl: bcm: Add STB family pin controller driver Andrea della Porta
2025-07-15 18:31 ` [PATCH 3/7] arm64: dts: broadcom: bcm2712: Add pin controller nodes Andrea della Porta
2025-07-15 18:31 ` [PATCH 4/7] arm64: dts: broadcom: bcm2712: Add one more GPIO node Andrea della Porta
2025-07-15 18:31 ` [PATCH 5/7] arm64: dts: broadcom: bcm2712: Add second SDHCI controller node Andrea della Porta
2025-07-15 18:31 ` [PATCH 6/7] arm64: dts: broadcom: bcm2712: Add UARTA " Andrea della Porta
2025-07-15 18:31 ` [PATCH 7/7] arm64: defconfig: Enable BCM2712 on-chip pin controller driver Andrea della Porta
2025-07-15 20:02 ` [PATCH 0/7] Add pin control driver for BCM2712 SoC Stefan Wahren
2025-07-15 22:42 ` Rob Herring (Arm)
2025-07-22 10:02 ` Andrea della Porta [this message]
-- strict thread matches above, loose matches on Subject: below --
2024-07-31 6:28 Ivan T. Ivanov
2024-07-31 14:25 ` Rob Herring (Arm)
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