From: Guomin chen <guomin.chen@cixtech.com>
To: Jassi Brar <jassisinghbrar@gmail.com>
Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org,
catalin.marinas@arm.com, will@kernel.org, arnd@arndb.de,
Peter Chen <peter.chen@cixtech.com>,
linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
cix-kernel-upstream <cix-kernel-upstream@cixtech.com>,
maz@kernel.org, sudeep.holla@arm.com, kajetan.puchalski@arm.com,
eballetb@redhat.com, Gary Yang <gary.yang@cixtech.com>,
Lihua Liu <Lihua.Liu@cixtech.com>
Subject: Re: [PATCH v9 5/9] mailbox: add CIX mailbox driver
Date: Mon, 14 Jul 2025 12:43:51 +0000 [thread overview]
Message-ID: <aHT7h7/5Ip2dDJ4O@gchen> (raw)
In-Reply-To: <CABb+yY2BmqiQ18hU+7C234UnY8n-8PH5VEoS7nH5Xq5O1krGhQ@mail.gmail.com>
On Sun, Jul 13, 2025 at 12:00:06PM -0500, Jassi Brar wrote:
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>
> EXTERNAL EMAIL
>
> On Tue, Jul 8, 2025 at 8:54 AM Guomin chen <guomin.chen@cixtech.com> wrote:
> ....
> > > > +/* [0~7] Fast channel
> > > > + * [8] doorbell base channel
> > > > + * [9]fifo base channel
> > > > + * [10] register base channel
> > > > + */
> > > > +#define MBOX_FAST_IDX 7
> > > > +#define MBOX_DB_IDX 8
> > > > +#define MBOX_FIFO_IDX 9
> > > > +#define MBOX_REG_IDX 10
> > > > +#define CIX_MBOX_CHANS 11
> > > > +
> > > if it is not really a single controller owning different channels,
> > > maybe implement only what you currently use.
> > >
> > As mentioned in the previous email, a single controller can support
> > multiple different channels.
> >
> OK. I am not too worried about having all variants in one driver esp
> when it is manageable and share the code.
> Unless I am overlooking something. Arnd?
>
>
> > > > +static u32 cix_mbox_read(struct cix_mbox_priv *priv, u32 offset)
> > > > +{
> > > > + if (priv->use_shmem)
> > > > + return ioread32(priv->base + offset - SHMEM_OFFSET);
> > > > + else
> > > > + return ioread32(priv->base + offset);
> > > > +}
> > > > +
> > > use_shmem is set for only CIX_MBOX_TYPE_DB, but it affects every read/write.
> > > Maybe instead adjust the base for TYPE_DB?
> > >
> > The reason we introduced use_shmem here is that we had to adjust the base
> > address of TYPE_DB to resolve the reg conflict in the DTS.
> > This change has virtually no impact on performance.
> >
> Yes, I can see it should have no impact on performance and I think
> adjusting the base once
> during init is cleaner than checking the flag every read/write.
> But wait... use_shmem is a controller wide flag, and isn't
> priv->use_shmem always set to true in cix_mbox_init() ?
> Is the driver even tested?
> ....
Yes, we did perform testing before sending out the patch.
The test here shows no issues because there aren’t more clients.
There indeed exists a problem with priv->use_shmem always being set to
true in cix_mbox_init().
So I will add a restriction in the probe function in the next version.
> > > > +static int cix_mbox_startup(struct mbox_chan *chan)
> > > > +{
> > > > + struct cix_mbox_priv *priv = to_cix_mbox_priv(chan->mbox);
> > > > + struct cix_mbox_con_priv *cp = chan->con_priv;
> > > > + int index = cp->index, ret;
> > > > + u32 val_32;
> > > > +
> > > > + ret = request_irq(priv->irq, cix_mbox_isr, 0,
> > > > + dev_name(priv->dev), chan);
> > > The same irq is requested for each channel. How do you expect it to
> > > work? Maybe request it just once in probe and pass the 'priv' instead
> > > of 'chan' , and in the cix_mbox_isr handle according to INT_STATUS
> > >
> > For the same mailbox controller, there won't be multiple channels
> > simultaneously requesting the same IRQ, so there won't be an issue
> > here. As you mentioned, if we need to handle multiple channels working
> > concurrently in the future, we would need to modify cix_mbox_isr.
> > However, that is not required at the moment.
> >
> Is it too hard to do it right already?
>
We haven't set the IRQF_SHARED flag here because there is no scenario
where a single mailbox controller supports multiple channel clients simultaneously.
And, the ISR still requires the channel as an argument.
While this approach does not support multiple clients in parallel, it does allow
for better sequential support of multiple clients.
So we have placed it in the client's startup/shutdown lifecycle rather than in the
probe function.
Thanks
Guomin Chen
next prev parent reply other threads:[~2025-07-14 12:44 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-09 3:16 [PATCH v9 0/9] arm64: Introduce CIX P1 (SKY1) SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 1/9] dt-bindings: vendor-prefixes: Add CIX Technology Group Co., Ltd Peter Chen
2025-06-09 3:16 ` [PATCH v9 2/9] dt-bindings: arm: add CIX P1 (SKY1) SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 3/9] arm64: Kconfig: add ARCH_CIX for cix silicons Peter Chen
2025-06-09 3:16 ` [PATCH v9 4/9] dt-bindings: mailbox: add cix,sky1-mbox Peter Chen
2025-06-09 3:16 ` [PATCH v9 5/9] mailbox: add CIX mailbox driver Peter Chen
2025-07-02 1:08 ` Peter Chen
2025-07-04 16:04 ` Arnd Bergmann
2025-07-04 18:35 ` Jassi Brar
2025-07-08 9:51 ` Guomin chen
2025-07-06 19:30 ` Jassi Brar
2025-07-08 13:53 ` Guomin chen
2025-07-13 17:00 ` Jassi Brar
2025-07-14 12:43 ` Guomin chen [this message]
2025-07-14 15:39 ` Arnd Bergmann
2025-07-15 22:11 ` Jassi Brar
2025-07-16 2:28 ` Guomin chen
2025-07-16 7:19 ` Arnd Bergmann
2025-07-16 17:15 ` Jassi Brar
2025-06-09 3:16 ` [PATCH v9 6/9] arm64: defconfig: Enable CIX SoC Peter Chen
2025-06-09 3:16 ` [PATCH v9 7/9] dt-bindings: clock: cix: Add CIX sky1 scmi clock id Peter Chen
2025-06-09 3:16 ` [PATCH v9 8/9] arm64: dts: cix: Add sky1 base dts initial support Peter Chen
2025-07-05 8:20 ` Krzysztof Kozlowski
2025-07-07 2:50 ` Peter Chen
2025-06-09 3:16 ` [PATCH v9 9/9] MAINTAINERS: Add CIX SoC maintainer entry Peter Chen
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