Re: [PATCH v2 7/9] watchdog: rzv2h: Set min_timeout based on max_hw_heartbeat_ms

Lad, Prabhakar
2025-08-01T15:31:21Z

Hi Guenter,

On Fri, Aug 1, 2025 at 2:52 PM Guenter Roeck <linux@roeck-us.net> wrote:
>
> On 8/1/25 04:05, Lad, Prabhakar wrote:
> > Hi Wolfram,
> >
> > Thank you for the review.
> >
> > On Fri, Aug 1, 2025 at 5:10 AM Wolfram Sang
> > <wsa+renesas@sang-engineering.com> wrote:
> >>
> >> On Tue, Jul 29, 2025 at 04:59:13PM +0100, Prabhakar wrote:
> >>> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >>>
> >>> Update the watchdog minimum timeout value to be derived from
> >>> `max_hw_heartbeat_ms` using `DIV_ROUND_UP()` to ensure a valid and
> >>> consistent minimum timeout in seconds.
> >>
> >> I don't understand this change. Why is the _minimum_ timeout based on
> >> the _maximum_ heartbeat?
> >>
> > The reason for deriving min_timeout from max_hw_heartbeat_ms is to
> > ensure the minimum watchdog period (in seconds) is compatible with the
> > underlying hardware.
> >
> > max_hw_heartbeat_ms is calculated as:
> > max_hw_heartbeat_ms = (1000 * 16384 * cks_div) / clk_rate;
> >
> > This value varies by SoC:
> > RZ/T2H: cks_div = 8192, clk ≈ 62.5 MHz -> max_hw_heartbeat_ms ~ 2147ms
> > RZ/V2H: cks_div = 256, clk ≈ 240 MHz -> max_hw_heartbeat_ms ~ 174ms
> >
> > Since min_timeout is in seconds, setting it to:
> > min_timeout = DIV_ROUND_UP(max_hw_heartbeat_ms, 1000);
> >
> > ensures:
> > The minimum timeout period is never less than what the hardware can support.
> > - For T2H, this results in a min_timeout of 3s (2147ms -> 3s).
> > - For V2H, it’s just 1s (174ms -> 1s).
> >
>
> Sorry, I completely fail to understand the logic.
>
> If the maximum timeout is, say, 2 seconds, why would the hardware
> not be able to support a timeout of 1 second ?
>
The watchdog timer on RZ/V2H (and RZ/T2H) is a 14 bit down counter. On
initialization the down counters on the SoCs are configured to the max
down counter. On RZ/V2H down counter value 4194304 (which evaluates to
174ms) is and on RZ/T2H is 134217728 (which evaluates to 2147ms). The
board will be reset when we get an underflow error.

So for example on T2H consider this example:
- down counter is 134217728
- min_timeout is set to 1 in the driver
- When set WDIOC_SETTIMEOUT to 1
In this case the board will be reset after 2147ms, i.e. incorrect
behaviour as we expect the board to be reset after 1 sec. Hence the
min_timeout is set to 3s (2147ms -> 3s).

Please let me know if my understanding of min_timeout is incorrect here.

Cheers,
Prabhakar