RE: [PATCH 4/4] clk: imx95-blk-ctl: Add one clock mux for HSIO block

Peng Fan
2025-10-10T10:12:49Z

> Subject: [PATCH 4/4] clk: imx95-blk-ctl: Add one clock mux for HSIO
> block
>
> The GPR_REG0 register has an USB_PHY_REF_CLK_SEL (bit 6) to select
> USB 3.0 PHY reference clock.
>
> USB_PHY_REF_CLK_SEL:
> bit[6] - 0b 24 MHz external oscillator
> - 1b 100 MHz high performance PLL
>
> Add a clock multiplexer to support USB3.0 PHY clock selection.
>
> Signed-off-by: Xu Yang <xu.yang_2@nxp.com>

Reviewed-by: Peng Fan <peng.fan@nxp.com>