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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?bGS/Re0SFx3xOlQaWW+AierLmtHE/vTiMa4CK21OHpL4CtVPmtMcdBF1RFca?= =?us-ascii?Q?fxGi2ePT5UN1goUETrssbw6+5FA29KND86IOOV6lx6E5oqcs9Jv0A+ogALuG?= =?us-ascii?Q?Q6cHJbtYPPfS17zQAjXfK2dnuQlTS5E3JdsD4tPkz0w4JcaT7sEZV+KKr/Ad?= =?us-ascii?Q?OfZHfqFQf3XZ8vtTuTz5bgXzAqTIh9Wi81uEdlz8aYubUx41RiZe4uTf6jSq?= =?us-ascii?Q?uj5H9nABIQ9XrNp9DdkhcMJx/WKD0TM8MINCyv+iegFVFEQhmzoSsjFlC2op?= =?us-ascii?Q?t4uojiea3bR962O0hGZA/VqKbBN/mKA5dDIcgHF0/Xl5T6W39x1Ik4TGUY/T?= =?us-ascii?Q?DdIedlqIh5QXqVztPIssGZ6ybQlOKkNnJzk/CDdtPIIVgy+s4UJemALBLZCu?= =?us-ascii?Q?148XqWER1EKP/x0WdRFn2uq8U+O7tB9Z847IQ5r2cHiHyF64hQel6v/zqmOw?= =?us-ascii?Q?dzA05AUM7sgLK/OXABVMZ/Xnz9s/ku6ZnknSg1R5qawSykLF17pQpvXxYzvR?= =?us-ascii?Q?OnIQYSXNEf+Y2DJC5nqkOx3+2L3oZR1rkNgvX7zoyoHDS6wbsAtHViCIuChd?= =?us-ascii?Q?prB3djccih59hijSQ3gY5h23Eh4J1ATZwXQfLqnFaZdjlDe/WsrMEuhtj9L6?= =?us-ascii?Q?cR9YL4Of58cu/jitbRwGelf3qUHLUfO7zHrGxjNWjtfF+GN9jxv07at5qLMv?= =?us-ascii?Q?VnTkVPzTSpvqkKALxiHDPbqiMPgxYByHn8NJpEY9OLxaIQKddBW0h4aQWfvX?= =?us-ascii?Q?g77tmRAwCAU0fLH0tLyCgQbuHQzQDpkrctdQ42GADaHcS6CZe88IxjMOywZh?= =?us-ascii?Q?C+ekaqflnzTt+aIwFHYRM+YMN0grI0XGPagJ5bXa3TPWJuvd0zF5x5rlLakJ?= =?us-ascii?Q?ov23O4Na2tVXeEEucvxqnUdgI0y5CsGnpp9ZN8QTtlIiRfRshemG0s8WRyUG?= =?us-ascii?Q?H/ni8GwuATGIlOd6vC5jbhEhR/QhK7aVcov3Hu3Bjrtnp5p9b20/FGOhFPv2?= =?us-ascii?Q?k5vzO4E/cgv9OCDpcViP4GcRVssVBMZhfHnvoYQ8e3Qajeypf70fXDpE/pU6?= =?us-ascii?Q?1Kiymd+/jTkpwYVMJzE1Elg01K0XH3JvaYJ006XETW1yJfrduLJe8B+Ru6z5?= =?us-ascii?Q?vSpJ2wlSjKt2zHOpMCA1JLb7SOWm+/XUG6T8liEcZ3VgBPDbpp3W0wx1uRo6?= =?us-ascii?Q?8k8vSfFBB3R57gPq23277O2rfcKy/UYVnE4FAdmQ949XyDBSffZ8INsvfjuz?= =?us-ascii?Q?cY2yWQbAz8UZZFASVgEtvdZQw0AKNSgtGcMMurlIs08R/dxUpZ1pNDBN8I4d?= =?us-ascii?Q?OLMbV2rqCzVLqruGxL1jzRo76hsPeNO/W7GbzOSScyBCdxmlQd6c9bvknm7Z?= =?us-ascii?Q?ap6l9aP6igoQmO/po7ME8a7QLMMyhFnf6Zpi/7sw9BKuFadnnr41L2ivPNC1?= =?us-ascii?Q?L51mlo3M2uA/9IAHcPc4ep8PE02aNbcsiHHXA/RpIBoqujJG5uHL1PLUOYPs?= =?us-ascii?Q?ixtsBt9mTObiwOiGJ65PVrRCdWnuSRfvcC6aIJwbp5E9LTGjH5CD/eWqKtNp?= =?us-ascii?Q?ol+v+0BYwUhsWV8cr+i1NLclLNKRFENtlPOcg0im?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 28cc43b1-5ad3-4f77-9fb5-08ddf78dc9e6 X-MS-Exchange-CrossTenant-AuthSource: PAXSPRMB0053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 19 Sep 2025 15:04:10.7688 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 62tNBOLDYqw0zmj3w5P/jKlNS9X2UZw+iazClRIm3VGTB8/jGvfr6dTxlmaYu3rVAQqkM2I/ZXll0Y5QcYQUSw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PA4PR04MB7743 On Fri, Jul 04, 2025 at 05:03:52PM +0800, Liu Ying wrote: > CRTC(s) could still be running after the DRM device is unplugged by > calling drm_dev_unplug(), because the CRTC disablement logic is > protected and bypassed by the drm_dev_enter()/drm_dev_exit() pair. > Hence, Pixel Engine's AXI clock use count(managed by Pixel Engine > driver's runtime PM) and pixel clock use count could be inbalanced > after removing and re-installing the driver module. To fix this, > add a helper dc_crtc_disable_at_boot() and call it to properly > disable all CRTCs before advertising DRM device to user-space by > calling drm_dev_register(). > > Fixes: 711a3b878366 ("drm/imx: Add i.MX8qxp Display Controller KMS") > Signed-off-by: Liu Ying > --- > drivers/gpu/drm/imx/dc/dc-crtc.c | 50 ++++++++++++++++++++++++++++++++++++---- > drivers/gpu/drm/imx/dc/dc-drv.c | 5 ++++ > drivers/gpu/drm/imx/dc/dc-drv.h | 3 +++ > 3 files changed, 53 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/imx/dc/dc-crtc.c b/drivers/gpu/drm/imx/dc/dc-crtc.c > index 31d3a982deaf7a0390937285c9d5d00100323181..45a87df1ad6a8bd768aa5ed38d6f03f14052b3d7 100644 > --- a/drivers/gpu/drm/imx/dc/dc-crtc.c > +++ b/drivers/gpu/drm/imx/dc/dc-crtc.c > @@ -293,6 +293,16 @@ dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) > dc_crtc_queue_state_event(new_crtc_state); > } > > +static inline void __dc_crtc_disable_fg(struct drm_crtc *crtc) > +{ > + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); > + > + enable_irq(dc_crtc->irq_dec_seqcomplete); > + dc_fg_disable(dc_crtc->fg); > + DC_CRTC_WAIT_FOR_COMPLETION_TIMEOUT(dec_seqcomplete_done); > + disable_irq(dc_crtc->irq_dec_seqcomplete); > +} > + > static void > dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > { > @@ -305,11 +315,7 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > if (!drm_dev_enter(crtc->dev, &idx)) > goto out; > > - enable_irq(dc_crtc->irq_dec_seqcomplete); > - dc_fg_disable(dc_crtc->fg); > - DC_CRTC_WAIT_FOR_COMPLETION_TIMEOUT(dec_seqcomplete_done); > - disable_irq(dc_crtc->irq_dec_seqcomplete); > - > + __dc_crtc_disable_fg(crtc); > dc_fg_disable_clock(dc_crtc->fg); > > /* request pixel engine power-off as plane is off too */ > @@ -337,6 +343,40 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > spin_unlock_irq(&crtc->dev->event_lock); > } > > +void dc_crtc_disable_at_boot(struct drm_crtc *crtc) > +{ > + struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); > + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); > + int ret; > + > + ret = pm_runtime_resume_and_get(dc_crtc->de->dev); > + if (ret < 0) { > + dc_crtc_err(crtc, "failed to get DC display engine RPM: %d\n", > + ret); > + return; > + } > + > + if (!dc_fg_wait_for_frame_index_moving(dc_crtc->fg)) { > + dc_crtc_dbg(crtc, "FrameGen frame index isn't moving\n"); > + goto out; > + } > + > + dc_crtc_dbg(crtc, "disabling at boot\n"); > + __dc_crtc_disable_fg(crtc); > + dc_fg_disable_clock(dc_crtc->fg); > + > + if (!dc_drm->pe_clk_axi_disabled) { > + clk_disable_unprepare(dc_drm->pe->clk_axi); > + dc_drm->pe_clk_axi_disabled = true; > + } look like dc_crtc_disable_at_boot() call by dc_drm_bind(), does it call twice without call unbind()? Most like other place paired function have not correct. Frank > + > +out: > + ret = pm_runtime_put(dc_crtc->de->dev); > + if (ret < 0) > + dc_crtc_err(crtc, "failed to put DC display engine RPM: %d\n", > + ret); > +} > + > static bool dc_crtc_get_scanout_position(struct drm_crtc *crtc, > bool in_vblank_irq, > int *vpos, int *hpos, > diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c > index 04f021d2d6cfc93972aa8d9073be24d347152602..f93766b6bfbfae8510db05278d104820ca0719c4 100644 > --- a/drivers/gpu/drm/imx/dc/dc-drv.c > +++ b/drivers/gpu/drm/imx/dc/dc-drv.c > @@ -17,6 +17,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -96,6 +97,7 @@ static int dc_drm_bind(struct device *dev) > struct dc_priv *priv = dev_get_drvdata(dev); > struct dc_drm_device *dc_drm; > struct drm_device *drm; > + struct drm_crtc *crtc; > int ret; > > dc_drm = devm_drm_dev_alloc(dev, &dc_drm_driver, struct dc_drm_device, > @@ -118,6 +120,9 @@ static int dc_drm_bind(struct device *dev) > if (ret) > return ret; > > + drm_for_each_crtc(crtc, drm) > + dc_crtc_disable_at_boot(crtc); > + > ret = drm_dev_register(drm, 0); > if (ret) { > dev_err(dev, "failed to register drm device: %d\n", ret); > diff --git a/drivers/gpu/drm/imx/dc/dc-drv.h b/drivers/gpu/drm/imx/dc/dc-drv.h > index eb61b8c7626933adc7688f046139e2167665dad1..68e99ba7cedbca1b8bdc0d8ced7a610a1056bfc7 100644 > --- a/drivers/gpu/drm/imx/dc/dc-drv.h > +++ b/drivers/gpu/drm/imx/dc/dc-drv.h > @@ -50,6 +50,8 @@ struct dc_drm_device { > struct dc_pe *pe; > /** @tc: tcon list */ > struct dc_tc *tc[DC_DISPLAYS]; > + /** @pe_clk_axi_disabled: disablement flag at boot */ > + bool pe_clk_axi_disabled; > }; > > struct dc_subdev_info { > @@ -96,6 +98,7 @@ static inline int dc_subdev_get_id(const struct dc_subdev_info *info, > return -EINVAL; > } > > +void dc_crtc_disable_at_boot(struct drm_crtc *crtc); > void dc_de_post_bind(struct dc_drm_device *dc_drm); > void dc_pe_post_bind(struct dc_drm_device *dc_drm); > > > -- > 2.34.1 >