From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id BBA132D3EC5; Tue, 9 Sep 2025 10:26:14 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757413576; cv=none; b=GbaQIi/1rsdr3ktdeAAN49wEgbdya8kUc5ucrcnfoktyS4YKePCsfXsWGCT3eGgKBbUVRPWFFCmhaL3g3FgmsH/oADtU2wuJgZzqD/NdHAsoqL+XlFb3DPFYiFAywlA8vUd/DXVEWyj2DEetATl709j+LdhbLot3VpwoLg/XzfM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1757413576; c=relaxed/simple; bh=Q3Kp9eto2xFOc1OFfv9ITTgheZnnDyXo8YEz28FwXBA=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=gvDwdlHDP4/oEm5hJLHS1yCy8bZU0xLbHY/2tf2f3hdWoMJgNR1UjyxCLA/+Jel+8wFmxuM/A+jiev1Gcm7Hg/eUz/m8Vl8xgEBeaeX+Uu7mkHNyupEB5/5R97c87m5/pIgxBqX6j/awajSFuE1szxiPRbX24TmRxLaw4jn+Tps= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B85C3113E; Tue, 9 Sep 2025 03:26:05 -0700 (PDT) Received: from e133380.arm.com (e133380.arm.com [10.1.197.68]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 3CDB83F66E; Tue, 9 Sep 2025 03:26:08 -0700 (PDT) Date: Tue, 9 Sep 2025 11:26:05 +0100 From: Dave Martin To: James Morse Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, devicetree@vger.kernel.org, shameerali.kolothum.thodi@huawei.com, D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Rex Nie , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Krzysztof Kozlowski , Conor Dooley , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich Subject: Re: [PATCH 07/33] arm64: kconfig: Add Kconfig entry for MPAM Message-ID: References: <20250822153048.2287-1-james.morse@arm.com> <20250822153048.2287-8-james.morse@arm.com> <978cf822-4d7c-4301-bbc4-752f184c93d6@arm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <978cf822-4d7c-4301-bbc4-752f184c93d6@arm.com> Hi, On Thu, Sep 04, 2025 at 06:28:14PM +0100, James Morse wrote: > Hi Dave, > > On 27/08/2025 12:01, Dave Martin wrote: > > > > Uh oh! > > > (Since this likely be people's go-to patch for understanding what MPAM > > is, it is probably worth going the extra mile.) > > > > On Fri, Aug 22, 2025 at 03:29:48PM +0000, James Morse wrote: > >> The bulk of the MPAM driver lives outside the arch code because it > >> largely manages MMIO devices that generate interrupts. The driver > >> needs a Kconfig symbol to enable it, as MPAM is only found on arm64 > > > > Prefer -> "[...] to enable it. As MPAM is only [...]" > > > >> platforms, that is where the Kconfig option makes the most sense. > > > > It could be clearer what "where" refers to, here. > > Sure, > > > > Maybe reword from ", that is [...]" -> ", the arm64 tree is the most > > natural home for the Kconfig option." > > > > (Or something like that.) > > Sure, [... etc., etc. ...] > >> + partition-id and performance-monitoring-group to measure the > >> + cache occupancy or data throughput. > > > > So, how about something like: > > > > --8<-- > > > > Memory system components, such as the caches, can be configured with > > policies to control how much of various physical resources (such as > > memory bandwidth or cache memory) the transactions labelled with each > > PARTID can consume. Depending on the capabilities of the hardware, > > the PARTID and PMG can also be used as filtering criteria to measure > > the memory system resource consumption of different parts of a > > workload. > > > > -->8-- > > Done, > > > > (Where "Memory system components" is used in a generic sense and so not > > capitalised.) > > (I can't wait for the Memory System Component on the Memory Side Cache!) Urk. MSCē ? [...] Cheers ---Dave