From: Drew Fustini <fustini@kernel.org>
To: Ben Dooks <ben.dooks@codethink.co.uk>
Cc: Conor Dooley <conor@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Alexandre Ghiti <alex@ghiti.fr>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Samuel Holland <samuel.holland@sifive.com>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Thomas Gleixner <tglx@linutronix.de>,
Anup Patel <anup@brainfault.org>, Arnd Bergmann <arnd@arndb.de>,
Joel Stanley <jms@tenstorrent.com>, Joel Stanley <joel@jms.id.au>,
Michael Neuling <mikey@neuling.org>,
Nicholas Piggin <npiggin@gmail.com>,
Michael Ellerman <mpe@kernel.org>, Andy Gross <agross@kernel.org>,
linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,
devicetree@vger.kernel.org,
Drew Fustini <dfustini@tenstorrent.com>
Subject: Re: [PATCH 6/7] riscv: dts: Add Tenstorrent Blackhole A0 SoC PCIe cards
Date: Tue, 16 Sep 2025 10:27:24 -0700 [thread overview]
Message-ID: <aMmd/JQAfPwKuYyB@x1> (raw)
In-Reply-To: <70241f44-2f8d-4945-9c84-71416776cefd@codethink.co.uk>
On Tue, Sep 16, 2025 at 02:56:05PM +0100, Ben Dooks wrote:
> On 15/09/2025 18:52, Drew Fustini wrote:
> > On Mon, Sep 15, 2025 at 05:47:08PM +0100, Conor Dooley wrote:
> > > On Sat, Sep 13, 2025 at 02:31:05PM -0700, Drew Fustini wrote:
> > > > new file mode 100644
> > > > index 0000000000000000000000000000000000000000..b2b08023643a2cebd4f924579024290bb355c9b3
> > > > --- /dev/null
> > > > +++ b/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts
> > > > @@ -0,0 +1,14 @@
> > > > +// SPDX-License-Identifier: (GPL-2.0 OR MIT)
> > > > +/dts-v1/;
> > > > +
> > > > +#include "blackhole-a0.dtsi"
> > > > +
> > > > +/ {
> > > > + model = "Tenstorrent Blackhole A0 SoC PCIe card";
> > > > + compatible = "tenstorrent,blackhole-a0-card", "tenstorrent,blackhole-a0";
> > > > +
> > > > + memory@0 {
> > > > + device_type = "memory";
> > > > + reg = <0x4000 0x30000000 0x1 0x00000000>;
> > >
> > > This isn't at address zero as the node address claims.
> >
> > Thanks, I'll fix the unit address.
>
> Is it time to just assume any dtc can handle a 64bit number?
Is it not valid for me to use the 64 bit hex number in the unit address?
I changed it to memory@400030000000 and 'W=1 dtbs_check' did not
complain. Am I doing something wrong?
-------------------------------------------------
$ git diff
diff --git a/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts b/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts
index b2b08023643a..7963712b53ea 100644
--- a/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts
+++ b/arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dts
@@ -7,7 +7,7 @@ / {
model = "Tenstorrent Blackhole A0 SoC PCIe card";
compatible = "tenstorrent,blackhole-a0-card", "tenstorrent,blackhole-a0";
- memory@0 {
+ memory@400030000000 {
device_type = "memory";
reg = <0x4000 0x30000000 0x1 0x00000000>;
};
$ make W=1 ARCH=riscv CROSS_COMPILE=riscv64-linux-gnu- -j32 dtbs_check
DTC [C] arch/riscv/boot/dts/sifive/hifive-unleashed-a00.dtb
DTC [C] arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dtb
DTC [C] arch/riscv/boot/dts/tenstorrent/blackhole-a0-card.dtb
-------------------------------------------------
Thanks,
Drew
next prev parent reply other threads:[~2025-09-16 17:27 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-13 21:30 [PATCH 0/7] RISC-V: Add support for Tenstorrent Blackhole SoC Drew Fustini
2025-09-13 21:31 ` [PATCH 1/7] dt-bindings: vendor-prefixes: Add Tenstorrent AI ULC Drew Fustini
2025-09-16 13:33 ` Rob Herring (Arm)
2025-09-13 21:31 ` [PATCH 2/7] dt-bindings: riscv: Add Tenstorrent Blackhole compatible Drew Fustini
2025-09-16 13:34 ` Rob Herring (Arm)
2025-09-13 21:31 ` [PATCH 3/7] dt-bindings: riscv: cpus: Add SiFive X280 compatible Drew Fustini
2025-09-16 13:37 ` Rob Herring (Arm)
2025-09-13 21:31 ` [PATCH 4/7] dt-bindings: timers: Add Tenstorrent Blackhole compatible Drew Fustini
2025-09-16 13:44 ` Rob Herring
2025-09-16 17:43 ` Drew Fustini
2025-09-13 21:31 ` [PATCH 5/7] dt-bindings: interrupt-controller: " Drew Fustini
2025-09-13 21:31 ` [PATCH 6/7] riscv: dts: Add Tenstorrent Blackhole A0 SoC PCIe cards Drew Fustini
2025-09-15 16:47 ` Conor Dooley
2025-09-15 17:52 ` Drew Fustini
2025-09-16 13:56 ` Ben Dooks
2025-09-16 17:27 ` Drew Fustini [this message]
2025-09-16 18:25 ` Ben Dooks
2025-09-13 21:31 ` [PATCH 7/7] riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs Drew Fustini
2025-09-15 16:48 ` Conor Dooley
2025-09-15 17:52 ` Drew Fustini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=aMmd/JQAfPwKuYyB@x1 \
--to=fustini@kernel.org \
--cc=agross@kernel.org \
--cc=alex@ghiti.fr \
--cc=anup@brainfault.org \
--cc=arnd@arndb.de \
--cc=ben.dooks@codethink.co.uk \
--cc=conor+dt@kernel.org \
--cc=conor@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=dfustini@tenstorrent.com \
--cc=jms@tenstorrent.com \
--cc=joel@jms.id.au \
--cc=krzk+dt@kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-riscv@lists.infradead.org \
--cc=mikey@neuling.org \
--cc=mpe@kernel.org \
--cc=npiggin@gmail.com \
--cc=palmer@dabbelt.com \
--cc=paul.walmsley@sifive.com \
--cc=robh@kernel.org \
--cc=samuel.holland@sifive.com \
--cc=tglx@linutronix.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).