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s=mail; t=1758206043; bh=OJ/iqE0vvbz18E6GMkIrxbTsaF2vnkeSqVJuU7BblCQ=; h=Date:From:To:Cc:Subject:References:In-Reply-To; b=YEWrKUzSsCSY/6lIet+LJXfrbqvxxgBxu6EEaX8WOASNrM38vUChMCZrBB90JUeZr PYE4avyLNpvtfF3gMXoo/oN4PzmqZRuq3zKlh6TIzhiqSezN8/ZUxp5MzRdt+aXPqZ C878VW1nj0rQliDJ4fSM76NUg9MIMxlTihpAKWpybl0tWvALkOrBbqexPFr5o1qXpg 3rmhgnenssdkNeC17OKLvMoWxS8IBGORgKww22AU2aqImLklkm8lEnnTRsKEVVhN9q nZUmKMgCaje+iGZkQ6UF4F3mNjEudmMO9W4ifJ7wT9WeOdKg5wkOLfMUHye9TgosOc qQn2tknU207Yg== Date: Thu, 18 Sep 2025 14:33:40 +0000 From: Yao Zi To: Yixun Lan , Alex Elder Cc: broonie@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, linux-spi@vger.kernel.org, devicetree@vger.kernel.org, paul.walmsley@sifive.com, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, p.zabel@pengutronix.de, spacemit@lists.linux.dev, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 3/3] riscv: dts: spacemit: define a SPI controller node Message-ID: References: <20250917220724.288127-1-elder@riscstar.com> <20250917220724.288127-4-elder@riscstar.com> <20250918133209-GYB1273705@gentoo.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20250918133209-GYB1273705@gentoo.org> On Thu, Sep 18, 2025 at 09:32:09PM +0800, Yixun Lan wrote: > Hi Alex, > > On 17:07 Wed 17 Sep , Alex Elder wrote: > > Define a node for the fourth SoC SPI controller (number 3) on > > the SpacemiT K1 SoC. > > > > Enable it on the Banana Pi BPI-F3 board, which exposes this feature > > via its GPIO block: > > GPIO PIN 19: MOSI > > GPIO PIN 21: MISO > > GPIO PIN 23: SCLK > > GPIO PIN 24: SS (inverted) > > > > Define pincontrol configurations for the pins as used on that board. > > > > (This was tested using a GigaDevice GD25Q64E SPI NOR chip.) > > > > Signed-off-by: Alex Elder > > --- > > .../boot/dts/spacemit/k1-bananapi-f3.dts | 6 ++++++ > > arch/riscv/boot/dts/spacemit/k1-pinctrl.dtsi | 20 +++++++++++++++++++ > > arch/riscv/boot/dts/spacemit/k1.dtsi | 19 ++++++++++++++++++ > > 3 files changed, 45 insertions(+) ... > > diff --git a/arch/riscv/boot/dts/spacemit/k1.dtsi b/arch/riscv/boot/dts/spacemit/k1.dtsi > > index 66b33a9110ccd..a826cc1ac83d5 100644 > > --- a/arch/riscv/boot/dts/spacemit/k1.dtsi > > +++ b/arch/riscv/boot/dts/spacemit/k1.dtsi > > @@ -834,6 +834,25 @@ storage-bus { > > #size-cells = <2>; > > dma-ranges = <0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; > > > > + spi3: spi@d401c000 { > > + compatible = "spacemit,k1-spi"; > > + reg = <0x0 0xd401c000 0x0 0x30>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + clocks = <&syscon_apbc CLK_SSP3>, > > + <&syscon_apbc CLK_SSP3_BUS>; > .. > > + clock-names = "core", > > + "bus"; > can you simply put them together in one line? it's kind of tedious to split.. > > + resets = <&syscon_apbc RESET_SSP3>; > > + interrupts-extended = <&plic 55>; > why use interrupts-extended? > > + spacemit,k1-ssp-id = <3>; > > + dmas = <&pdma 20>, > > + <&pdma 19>; > .. em, so the SPI will use pdma, then probably you should also adjust Kconfig to > select PDMA driver? The driver seems to depend on the generic DMA engine API only, IOW, theoretically it should work with other DMA controller as well. And it's even capable to operate without DMA (see k1_spi_dma_setup()). Dependency to PDMA really doesn't seem something should be enforced in Kconfig: it doesn't exist in code level, and the driver is actually more flexible. Best regards, Yao Zi > > + dma-names = "rx", > > + "tx"; > > + status = "disabled"; > > + }; > > + > > emmc: mmc@d4281000 { > > compatible = "spacemit,k1-sdhci"; > > reg = <0x0 0xd4281000 0x0 0x200>; > > -- > > 2.48.1 > > > > > > -- > Yixun Lan (dlan) >