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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?nSCRMdgof8eBLUsvgXFTA3jewwtWewgfRy/b/Lbilixis4L7ccA6Rav6Csio?= =?us-ascii?Q?ZitOGXNVSgUxv5VPTNRjvVqD40rAbt9lF66RIecoc7zIytx3XqHMIgSuB3LS?= =?us-ascii?Q?k8p4uogoK359sJsJSETCzB45O1Fr5G+qqcFUr3TSEQHrfiWB+CYYVfbYWHqY?= =?us-ascii?Q?Gh4R5iSMWJdWqusD4+9DxKYLCMzgjxtt10gixwAHFcXcYS8bJCkXNWXYUt9z?= =?us-ascii?Q?KSfUykbD4iu5nQstAWCE/9c/RrX0Oqj/GlmQ+2SpP2jKXkp/qO0QuIrbYpyI?= =?us-ascii?Q?mNwAgjXMyYvNT2oZjCNCLbiJZPcR8C/IZ3fPGkqT6znR3jjuv5aVSV9VJ9T+?= =?us-ascii?Q?lmr8G7Qb8V0BqXxVCwWS+RAFTsNDGgVDCpUZcdcbOhur+fjTvp4jqydAyWgc?= =?us-ascii?Q?EdBdhwmUJDwh0tpjBpe9CI6Dk4H+V3ScKup2mi5uMT9I2dYbZlkpJswQ27U0?= =?us-ascii?Q?tGES48XR/6i4JqMR/GUAZe7xATK3Lg77IUl+m9SFwXxlprv2lKCJ6HWC2Et4?= =?us-ascii?Q?cIiNnujiTz/haJS9LsH83gfGbIayrK2B2p389sg0erZCSsJWee4QhUkPxyZP?= =?us-ascii?Q?caj3wxbBIBbnFewlPMze5WSaHPWTyI4IiCImA7jh1WfJcFQZ2p6G4oVXuxRK?= =?us-ascii?Q?XkyjnPD181aekvpZdrKevEYKT3npLT8Jr+pkVQ+LCIPq5OuJ9hc7QmBy5fb4?= =?us-ascii?Q?mgWbFr2v6NZ8+a7wF9Fbt4nozNkLQAjihvgZVHw5xSohmp1zS9G86yTCuW2M?= =?us-ascii?Q?CPpUKjXy+WPZcl5dDlJwo3HjSdqbIIOlGHQ9k9kz+O3JTsTEtRpkYXb+/8pL?= =?us-ascii?Q?FbTu5pdaiDBIlxBDOEzQ/uZ5UiV1HFE9Bt5CuqMD/9DoLpG/lbHKlF7Eb6AU?= =?us-ascii?Q?uozEnCW89+hAOFZSVmSGLuti1JV0YTWtA1q7NXEUXG7zsPEzu4TILtSshWOc?= =?us-ascii?Q?XmdmP+h8lJUe5Vqdrz2fYqKH37+KNtEWDXUcs4FyiSJHUtNkpMZn9cc2QChy?= =?us-ascii?Q?/STtv6N+hds+4I0HwH+1J+BDxVlDGl1NZ/1W6kcZfHLTMTafF0a+uo8EREcG?= =?us-ascii?Q?ohTEjKHn/q7/aqPo91wWYVvQfQSa8BwCfmK3/LZp/HW51KjPMaVco87s73Gd?= =?us-ascii?Q?B6b+l0FA/V5+mo3F5+Rr74odjf5xQYC4udDafkZoYeXGr+Dy1xO9GtRIpTBp?= =?us-ascii?Q?bdYcA4ZoJPlV8jHwX/GdZwdd+xOTCWKrMjHXTX7vKdrGC+aLjbX8W3n2BDIR?= =?us-ascii?Q?9rQgd4t4VrS+2icfTwxi5geIZNSuXA50PFiwqtxN4lwnX8o4cI2ylwP8HpHR?= =?us-ascii?Q?QlT9AmEc+BZVdhxJF6Fx+zRKiQ3gacaaeKZpE3h9Rimtw7P9J32rjlFpryU0?= =?us-ascii?Q?c7dRRSqtCS7RxWjh189IKxESQzHVck41+Lt3McdzQxpE4iXtTo2BfHroXhN1?= =?us-ascii?Q?eJ6jvQXxkUgkAcDUy+PICGenssZzqyR9BRsNkZ1Kcc29XXczHXgRZRT3vLGA?= =?us-ascii?Q?kXhokaofOP8Xb9Mk/Z8qlAIXpBFbjiXYjVl9qMrLdbxm3Jjeh7QWAgD3tlBB?= =?us-ascii?Q?EhotGwfSb+8egHLvZqlvGD9e3el/cZYDRW1+bLdU?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: f720ad2c-21fb-442c-234f-08ddfad85a20 X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2025 19:35:28.9908 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zSha3OZ5wCXYzMPQS+teVzAuy9WWURpf44ygbebwxP2bLnN7JR7orDjUPDg5tv4GhQ/kft09t73L7USwqEECcw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM7PR04MB6823 On Tue, Sep 23, 2025 at 08:12:00PM +0800, zhangsenchuan@eswincomputing.com wrote: > From: Senchuan Zhang > > Add Device Tree binding documentation for the Eswin EIC7700 PCIe > controller module, the PCIe controller enables the core to correctly > initialize and manage the PCIe bus and connected devices. > > Signed-off-by: Yu Ning > Signed-off-by: Yanghui Ou > Signed-off-by: Senchuan Zhang > --- > .../bindings/pci/eswin,eic7700-pcie.yaml | 173 ++++++++++++++++++ > 1 file changed, 173 insertions(+) > create mode 100644 Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > > diff --git a/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > new file mode 100644 > index 000000000000..2f105d09e38e > --- /dev/null > +++ b/Documentation/devicetree/bindings/pci/eswin,eic7700-pcie.yaml > @@ -0,0 +1,173 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/pci/eswin,eic7700-pcie.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Eswin EIC7700 PCIe host controller > + > +maintainers: > + - Yu Ning > + - Senchuan Zhang > + - Yanghui Ou > + > +description: > + The PCIe controller on EIC7700 SoC. > + > +allOf: > + - $ref: /schemas/pci/pci-host-bridge.yaml# suggest move it after required, incase add if-else in future. Frank > + > +properties: > + compatible: > + const: eswin,eic7700-pcie > + > + reg: > + maxItems: 3 > + > + reg-names: > + items: > + - const: dbi > + - const: config > + - const: mgmt > + > + ranges: > + maxItems: 3 > + > + num-lanes: > + maximum: 4 > + > + '#interrupt-cells': > + const: 1 > + > + interrupts: > + maxItems: 9 > + > + interrupt-names: > + items: > + - const: msi > + - const: inta # Assert_INTA > + - const: intb # Assert_INTB > + - const: intc # Assert_INTC > + - const: intd # Assert_INTD > + - const: inte # Desassert_INTA > + - const: intf # Desassert_INTB > + - const: intg # Desassert_INTC > + - const: inth # Desassert_INTD > + > + interrupt-map: > + maxItems: 4 > + > + interrupt-map-mask: > + items: > + - const: 0 > + - const: 0 > + - const: 0 > + - const: 7 > + > + clocks: > + maxItems: 4 > + > + clock-names: > + items: > + - const: mstr > + - const: dbi > + - const: pclk > + - const: aux > + > + resets: > + maxItems: 2 > + > + reset-names: > + items: > + - const: cfg > + - const: powerup > + > +patternProperties: > + "^pcie@": > + type: object > + $ref: /schemas/pci/pci-pci-bridge.yaml# > + > + properties: > + reg: > + maxItems: 1 > + > + resets: > + maxItems: 1 > + > + reset-names: > + items: > + - const: perst > + > + required: > + - reg > + - ranges > + - resets > + - reset-names > + > + unevaluatedProperties: false > + > +required: > + - compatible > + - reg > + - ranges > + - interrupts > + - interrupt-names > + - interrupt-map-mask > + - interrupt-map > + - '#interrupt-cells' > + - clocks > + - clock-names > + - resets > + - reset-names > + > +unevaluatedProperties: false > + > +examples: > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + pcie@54000000 { > + compatible = "eswin,eic7700-pcie"; > + reg = <0x0 0x54000000 0x0 0x4000000>, > + <0x0 0x40000000 0x0 0x800000>, > + <0x0 0x50000000 0x0 0x100000>; > + reg-names = "dbi", "config", "mgmt"; > + #address-cells = <3>; > + #size-cells = <2>; > + #interrupt-cells = <1>; > + ranges = <0x01000000 0x0 0x40800000 0x0 0x40800000 0x0 0x800000>, > + <0x02000000 0x0 0x41000000 0x0 0x41000000 0x0 0xf000000>, > + <0x43000000 0x80 0x00000000 0x80 0x00000000 0x2 0x00000000>; > + bus-range = <0x00 0xff>; > + clocks = <&clock 203>, > + <&clock 204>, > + <&clock 205>, > + <&clock 206>; > + clock-names = "mstr", "dbi", "pclk", "aux"; > + resets = <&reset 97>, > + <&reset 98>; > + reset-names = "cfg", "powerup"; > + interrupts = <220>, <179>, <180>, <181>, <182>, <183>, <184>, <185>, <186>; > + interrupt-names = "msi", "inta", "intb", "intc", "intd", > + "inte", "intf", "intg", "inth"; > + interrupt-parent = <&plic>; > + interrupt-map-mask = <0x0 0x0 0x0 0x7>; > + interrupt-map = <0x0 0x0 0x0 0x1 &plic 179>, > + <0x0 0x0 0x0 0x2 &plic 180>, > + <0x0 0x0 0x0 0x3 &plic 181>, > + <0x0 0x0 0x0 0x4 &plic 182>; > + device_type = "pci"; > + pcie@0 { > + reg = <0x0 0x0 0x0 0x0 0x0>; > + #address-cells = <3>; > + #size-cells = <2>; > + ranges; > + device_type = "pci"; > + num-lanes = <4>; > + resets = <&reset 99>; > + reset-names = "perst"; > + }; > + }; > + }; > -- > 2.25.1 >