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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?lWQdhtg1Yg1zkhILQ4c+aILTWogHObIJkDtOmYZ/gSjrlI1V7OL3RPs7SA6E?= =?us-ascii?Q?Vr0u3njucGQWAb2VQCAvSNXRWPrt7DkVp69juxXVAxroWgDBvJtrZXfrA1YP?= =?us-ascii?Q?ycd3Z7VW7Fd8u5W2FOg/VxBiON/thUySAxRTZ23momvuUDBvq/IeFGNA/Exc?= =?us-ascii?Q?5O6xQt0BLbNkPvq9ZnJxzCNoKlquuYA2yFkmryVJSKRsBHYCsa+rjpynWO5q?= =?us-ascii?Q?xwFlwTS55NboGPtVWDfPbREGU2Ga1hnCYLs3ZiUIQz8I9l8+oGagZPvm4m+T?= =?us-ascii?Q?IccoGc6EkJhOBZTCGwi1ihGmOOd9slt6uJUqEi2k6z/LyHi/1bySAc1Wgkun?= =?us-ascii?Q?KASlaLfM1+eO8F5yXg/8Ubof3GzE/IiJzhUP5udmgBE4d7ExwNWAjLtHu25p?= =?us-ascii?Q?nrCuWS3FHtBYNrqDMsNlVf5Tv+jERpQ5EtHmVTPKnI6a5SASb/WKEa687dzg?= =?us-ascii?Q?oHA9B1JUbmFaOy3G+hS5qIy0WVGJbsQt1IIW+5S8KNy8gaKFaNutD78D7LbU?= =?us-ascii?Q?No71Z/o7B7NSA6h89KWQzZiz+kZ/JXUK72yRvIEXFlmbCFxZy+usrt/mN0Z9?= =?us-ascii?Q?b/b9G30xCeGz6+Xv/rkqX5F+ln/Pg6rsfX09U4UGtmG0+GNB/w9N1Rf6n5ky?= =?us-ascii?Q?NjBDrclm5LQdHbCPCaQeii2Q4wSIiNtkVvAqUEa/nYhRQkVyytJP/Taa0NBr?= =?us-ascii?Q?lBPxYqvcU0MzPa7dkZSORNPNzgiEoJAfkdKZ0kkObSXw9n/NPdjxJk5JEyvJ?= =?us-ascii?Q?XpaWnVKuPPiWKdGTM9DIQ6KaJswSiFoDBLyfy/x9AEaEp6KngbQGwSbMTO+E?= =?us-ascii?Q?UcJSHkXtiU2CKv1PfebDwrxjJcHPCkwmoYnaXKhZ3xILNO4CWMRT2oCNFYGl?= =?us-ascii?Q?f8dKTOtApqsiTnI0fveOeUkSrsAWqAJtsHPYlFmAuM+12V8vtnWRIYN3V6mA?= =?us-ascii?Q?7+90G68w6V378oSASqHVUTLbpyPN2+CiBVns6G3+1w92qOTkW/MZsYmLsIPw?= =?us-ascii?Q?xMtCADfUlZI711iCydHeXx9zAfpxCLfgH+zWJtMZwk2J9Kexv4Ff3rws8Yth?= =?us-ascii?Q?lD0k9oGb3jeyJzZWAaAoIDaCtx9DzHZF+Zsr0TK2pQaiwyhfcqsQlRCg42xr?= =?us-ascii?Q?YEClEzBaD/j+cn7mbsbtP3Noa+cri0yy8rCBAW0kkmy1nSvYFSl40sYVkXBU?= =?us-ascii?Q?o5faEuMCajkLO42cVk5Rsh4pc/Tj5uT/ndEgbPd571wvYdhM6UZJFLPuJA2U?= =?us-ascii?Q?5PYGg7pARZhoiSp4pdX7i0TVeLE9GTCMMKRDjPYHoDzl1yurczyLfMcGlzAX?= =?us-ascii?Q?cVQF8wQbhC5LjcoB0YkKCIbQuqsVuQQUlOvN8teXa9/CcPZvaDsumiQbAPfc?= =?us-ascii?Q?gH/1FsS/BN0Db8asuUByngutMCpKvG6n8knMczGoQ3gKohUy+w7ikzcGLP0s?= =?us-ascii?Q?c+dAMOBYo/xTy1O6gXqOM3PONl2ZRAxQ38tL4W4vE7kaDu8Jg7ZU0z7Uq2CQ?= =?us-ascii?Q?bmHKJ2aKCfqya8/HgofCTGNK8gmiUvB6XBHZ0VUs+6JgI5YAcku3IisRfN5L?= =?us-ascii?Q?8GQD0j5gjHeILvxEl8QkjDt5D/Nc/hiZP7AS5qoN?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e4c88906-0e23-45fa-e4bd-08ddfacc26fd X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 23 Sep 2025 18:08:09.6466 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UGTKomjrbBwsPWJUMAO3vCpIRVTpFgd/tnurwtJRo1bxmSAkPEDmjphJytJY3TNJyu6BSUg3eIpJr6CpFAyLwQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM8PR04MB8052 On Tue, Sep 23, 2025 at 10:07:55AM +0800, Liu Ying wrote: > CRTC(s) could still be running after the DRM device is unplugged by > calling drm_dev_unplug(), because the CRTC disablement logic is > protected and bypassed by the drm_dev_enter()/drm_dev_exit() pair. > Hence, Pixel Engine's AXI clock use count(managed by Pixel Engine > driver's runtime PM) and pixel clock use count could be inbalanced > after removing and re-installing the driver module. To fix this, > add a helper dc_crtc_disable_at_boot() and call it to properly > disable all CRTCs before advertising DRM device to user-space by > calling drm_dev_register(). > > Fixes: 711a3b878366 ("drm/imx: Add i.MX8qxp Display Controller KMS") > Signed-off-by: Liu Ying Reviewed-by: Frank Li > --- > drivers/gpu/drm/imx/dc/dc-crtc.c | 50 ++++++++++++++++++++++++++++++++++++---- > drivers/gpu/drm/imx/dc/dc-drv.c | 5 ++++ > drivers/gpu/drm/imx/dc/dc-drv.h | 3 +++ > 3 files changed, 53 insertions(+), 5 deletions(-) > > diff --git a/drivers/gpu/drm/imx/dc/dc-crtc.c b/drivers/gpu/drm/imx/dc/dc-crtc.c > index 31d3a982deaf7a0390937285c9d5d00100323181..45a87df1ad6a8bd768aa5ed38d6f03f14052b3d7 100644 > --- a/drivers/gpu/drm/imx/dc/dc-crtc.c > +++ b/drivers/gpu/drm/imx/dc/dc-crtc.c > @@ -293,6 +293,16 @@ dc_crtc_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state) > dc_crtc_queue_state_event(new_crtc_state); > } > > +static inline void __dc_crtc_disable_fg(struct drm_crtc *crtc) > +{ > + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); > + > + enable_irq(dc_crtc->irq_dec_seqcomplete); > + dc_fg_disable(dc_crtc->fg); > + DC_CRTC_WAIT_FOR_COMPLETION_TIMEOUT(dec_seqcomplete_done); > + disable_irq(dc_crtc->irq_dec_seqcomplete); > +} > + > static void > dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > { > @@ -305,11 +315,7 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > if (!drm_dev_enter(crtc->dev, &idx)) > goto out; > > - enable_irq(dc_crtc->irq_dec_seqcomplete); > - dc_fg_disable(dc_crtc->fg); > - DC_CRTC_WAIT_FOR_COMPLETION_TIMEOUT(dec_seqcomplete_done); > - disable_irq(dc_crtc->irq_dec_seqcomplete); > - > + __dc_crtc_disable_fg(crtc); > dc_fg_disable_clock(dc_crtc->fg); > > /* request pixel engine power-off as plane is off too */ > @@ -337,6 +343,40 @@ dc_crtc_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state) > spin_unlock_irq(&crtc->dev->event_lock); > } > > +void dc_crtc_disable_at_boot(struct drm_crtc *crtc) > +{ > + struct dc_drm_device *dc_drm = to_dc_drm_device(crtc->dev); > + struct dc_crtc *dc_crtc = to_dc_crtc(crtc); > + int ret; > + > + ret = pm_runtime_resume_and_get(dc_crtc->de->dev); > + if (ret < 0) { > + dc_crtc_err(crtc, "failed to get DC display engine RPM: %d\n", > + ret); > + return; > + } > + > + if (!dc_fg_wait_for_frame_index_moving(dc_crtc->fg)) { > + dc_crtc_dbg(crtc, "FrameGen frame index isn't moving\n"); > + goto out; > + } > + > + dc_crtc_dbg(crtc, "disabling at boot\n"); > + __dc_crtc_disable_fg(crtc); > + dc_fg_disable_clock(dc_crtc->fg); > + > + if (!dc_drm->pe_clk_axi_disabled) { > + clk_disable_unprepare(dc_drm->pe->clk_axi); > + dc_drm->pe_clk_axi_disabled = true; > + } > + > +out: > + ret = pm_runtime_put(dc_crtc->de->dev); > + if (ret < 0) > + dc_crtc_err(crtc, "failed to put DC display engine RPM: %d\n", > + ret); > +} > + > static bool dc_crtc_get_scanout_position(struct drm_crtc *crtc, > bool in_vblank_irq, > int *vpos, int *hpos, > diff --git a/drivers/gpu/drm/imx/dc/dc-drv.c b/drivers/gpu/drm/imx/dc/dc-drv.c > index 04f021d2d6cfc93972aa8d9073be24d347152602..f93766b6bfbfae8510db05278d104820ca0719c4 100644 > --- a/drivers/gpu/drm/imx/dc/dc-drv.c > +++ b/drivers/gpu/drm/imx/dc/dc-drv.c > @@ -17,6 +17,7 @@ > > #include > #include > +#include > #include > #include > #include > @@ -96,6 +97,7 @@ static int dc_drm_bind(struct device *dev) > struct dc_priv *priv = dev_get_drvdata(dev); > struct dc_drm_device *dc_drm; > struct drm_device *drm; > + struct drm_crtc *crtc; > int ret; > > dc_drm = devm_drm_dev_alloc(dev, &dc_drm_driver, struct dc_drm_device, > @@ -118,6 +120,9 @@ static int dc_drm_bind(struct device *dev) > if (ret) > return ret; > > + drm_for_each_crtc(crtc, drm) > + dc_crtc_disable_at_boot(crtc); > + > ret = drm_dev_register(drm, 0); > if (ret) { > dev_err(dev, "failed to register drm device: %d\n", ret); > diff --git a/drivers/gpu/drm/imx/dc/dc-drv.h b/drivers/gpu/drm/imx/dc/dc-drv.h > index eb61b8c7626933adc7688f046139e2167665dad1..68e99ba7cedbca1b8bdc0d8ced7a610a1056bfc7 100644 > --- a/drivers/gpu/drm/imx/dc/dc-drv.h > +++ b/drivers/gpu/drm/imx/dc/dc-drv.h > @@ -50,6 +50,8 @@ struct dc_drm_device { > struct dc_pe *pe; > /** @tc: tcon list */ > struct dc_tc *tc[DC_DISPLAYS]; > + /** @pe_clk_axi_disabled: disablement flag at boot */ > + bool pe_clk_axi_disabled; > }; > > struct dc_subdev_info { > @@ -96,6 +98,7 @@ static inline int dc_subdev_get_id(const struct dc_subdev_info *info, > return -EINVAL; > } > > +void dc_crtc_disable_at_boot(struct drm_crtc *crtc); > void dc_de_post_bind(struct dc_drm_device *dc_drm); > void dc_pe_post_bind(struct dc_drm_device *dc_drm); > > > -- > 2.34.1 >