[PATCH v6 2/9] dt-bindings: fsl,fpga-qixis-i2c: add support for LX2160ARDB FPGA

Ioana Ciornei
2025-10-14T15:54:20Z

Extend the list of supported compatible strings with fsl,lx2160ardb-fpga.

Since the register map exposed by the LX2160ARDB's FPGA also contains
two GPIO controllers, accept the necessary GPIO pattern property.
At the same time, add the #address-cells and #size-cells properties as
valid ones so that the child nodes of the fsl,lx2160ardb-fpga node are
addressable.

This is necessary because when defining child devices such as the GPIO
controller described in the added example, the child device needs a the
reg property to properly identify its register location in the parent
I2C device address space.

Impose this restriction for the new compatible through an if-statement.

The feature set exposed by these QIXIS FPGA devices is highly dependent
on the board type, meaning that even though the FPGA found on the
LX2160AQDS board (fsl,lx2160aqds-fpga) works in the same way in terms of
access over I2C as the one found on the LX2160ARDB (fsl,lx2160ardb-fpga
added here), the register map inside the device space is different since
there are different on-board devices to be controlled.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
---
Changes in v2:
- Enforce a unit address on the child gpios nodes (remove the ?)
- Enforce the use of unit addresses by having #address-size and
#size-cells only for the newly added fsl,lx2160ardb-fpga compatible
Changes in v3:
- Replace the trivial-gpio reference with an explicit mention of the
accepted child gpio compatible.
- Reword the commit message.
- Add the 'else' case to the if statement.
Changes in v4:
- Add an extra paragraph in the commit message to better explain the
context.
Changes in v5:
- none
Changes in v6:
- none

.../bindings/board/fsl,fpga-qixis-i2c.yaml | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)

diff --git a/Documentation/devicetree/bindings/board/fsl,fpga-qixis-i2c.yaml b/Documentation/devicetree/bindings/board/fsl,fpga-qixis-i2c.yaml
index 28b37772fb65..e889dac052e7 100644
--- a/Documentation/devicetree/bindings/board/fsl,fpga-qixis-i2c.yaml
+++ b/Documentation/devicetree/bindings/board/fsl,fpga-qixis-i2c.yaml
@@ -22,6 +22,13 @@ properties:
- fsl,lx2160aqds-fpga
- const: fsl,fpga-qixis-i2c
- const: simple-mfd
+ - const: fsl,lx2160ardb-fpga
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0

interrupts:
maxItems: 1
@@ -32,10 +39,37 @@ properties:
mux-controller:
$ref: /schemas/mux/reg-mux.yaml

+patternProperties:
+ "^gpio@[0-9a-f]+$":
+ type: object
+ additionalProperties: true
+
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,lx2160ardb-fpga-gpio-sfp
+
required:
- compatible
- reg

+allOf:
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - fsl,lx2160ardb-fpga
+ then:
+ required:
+ - "#address-cells"
+ - "#size-cells"
+ else:
+ properties:
+ "#address-cells": false
+ "#size-cells": false
+
additionalProperties: false

examples:
@@ -68,3 +102,27 @@ examples:
};
};

+ - |
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ board-control@66 {
+ compatible = "fsl,lx2160ardb-fpga";
+ reg = <0x66>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio@19 {
+ compatible = "fsl,lx2160ardb-fpga-gpio-sfp";
+ reg = <0x19>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "SFP2_TX_EN", "",
+ "", "",
+ "SFP2_RX_LOS", "SFP2_TX_FAULT",
+ "", "SFP2_MOD_ABS";
+ };
+ };
+ };
--
2.25.1