[PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[Marcelo Schmitt]

This patch series adds basic support for ad4134. AD4134 is a very flexible
device that can be configured in many different ways. This series aims to
support the simplest way of interfacing with AD4134 which is called minimum I/O
mode in data sheet. This is essentially usual SPI with the addition of an ODR
(Output Data Rate) GPIO which functions as conversion start signal in minimum
I/O mode. The CS pin may be connected to a host controller CS pin or grounded.

This set provides just one feature:
- Single-shot ADC sample read.

[PATCH 1] Device tree documentation for AD4134.
[PATCH 2] IIO Linux driver for AD4134.
[PATCH 3] Initial IIO documentation.

There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
configurations suited for high speed data transfers. Even though the minimum I/O
support was initialy based on that high speed transfer driver, the result ended
up becoming entirely different. Also, because the different wiring
configurations are likely going to use different resources and software
interfaces, the code for AD4134 support was split into ad4134-spi.c,
ad4134-common.h, and ad4134-common.c.

With best regards,
Marcelo

Marcelo Schmitt (3):
  dt-bindings: iio: adc: Add AD4134
  iio: adc: Initial support for AD4134
  Docs: iio: Add AD4134

 .../bindings/iio/adc/adi,ad4134.yaml          | 209 +++++++++++++
 Documentation/iio/ad4134.rst                  |  58 ++++
 Documentation/iio/index.rst                   |   1 +
 MAINTAINERS                                   |   9 +
 drivers/iio/adc/Kconfig                       |  15 +
 drivers/iio/adc/Makefile                      |   2 +
 drivers/iio/adc/ad4134-common.c               | 200 ++++++++++++
 drivers/iio/adc/ad4134-common.h               | 132 ++++++++
 drivers/iio/adc/ad4134-spi.c                  | 287 ++++++++++++++++++
 9 files changed, 913 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
 create mode 100644 Documentation/iio/ad4134.rst
 create mode 100644 drivers/iio/adc/ad4134-common.c
 create mode 100644 drivers/iio/adc/ad4134-common.h
 create mode 100644 drivers/iio/adc/ad4134-spi.c


base-commit: c5411c8b9ed1caf53604bb1a5be3f487988efc98
-- 
2.51.0

[PATCH v1 1/3] dt-bindings: iio: adc: Add AD4134

[Marcelo Schmitt]

Add device tree documentation for AD4134 24-Bit, 4-channel simultaneous
sampling, precision ADC.

Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
---
 .../bindings/iio/adc/adi,ad4134.yaml          | 209 ++++++++++++++++++
 MAINTAINERS                                   |   7 +
 2 files changed, 216 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml

diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
new file mode 100644
index 000000000000..a758d2542ab0
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
@@ -0,0 +1,209 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,ad4134.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD4134 ADC
+
+maintainers:
+  - Marcelo Schmitt <marcelo.schmitt@analog.com>
+
+description: |
+  The AD4134 is a quad channel, low noise, simultaneous sampling, precision
+  analog-to-digital converter (ADC).
+  Specifications can be found at:
+    https://www.analog.com/media/en/technical-documentation/data-sheets/ad4134.pdf
+
+$ref: /schemas/spi/spi-peripheral-props.yaml#
+
+properties:
+  compatible:
+    enum:
+      - adi,ad4134
+
+  reg:
+    maxItems: 1
+
+  spi-max-frequency:
+    maximum: 50000000
+
+  avdd5-supply:
+    description: A 5V supply that powers the chip's analog circuitry.
+
+  dvdd5-supply:
+    description: A 5V supply that powers the chip's digital circuitry.
+
+  iovdd-supply:
+    description:
+      A 1.8V supply that sets the logic levels for the digital interface pins.
+
+  refin-supply:
+    description:
+      A 4.096V or 5V supply that serves as reference for ADC conversions.
+
+  avdd1v8-supply:
+    description: A 1.8V supply used by the analog circuitry.
+
+  dvdd1v8-supply:
+    description: A 1.8V supply used by the digital circuitry.
+
+  clkvdd-supply:
+    description: A 1.8V supply for the chip's clock management circuit.
+
+  ldoin-supply:
+    description:
+      A 2.6V to 5.5V supply that generates 1.8V for AVDD1V8, DVDD1V8, and CLKVDD
+      pins.
+
+  clocks:
+    maxItems: 1
+    description:
+      Required external clock source. Can specify either a crystal or CMOS clock
+      source. If an external crystal is set, connect the CLKSEL pin to IOVDD.
+      Otherwise, connect the CLKSEL pin to IOGND and the external CMOS clock
+      signal to the XTAL2/CLKIN pin.
+
+  clock-names:
+    enum:
+      - xtal1-xtal2
+      - clkin
+    default: clkin
+
+  '#clock-cells':
+    const: 0
+
+  clock-output-names:
+    maxItems: 1
+
+  regulators:
+    type: object
+    description:
+      list of regulators provided by this controller.
+
+    properties:
+      vcm-output:
+        $ref: /schemas/regulator/regulator.yaml#
+        type: object
+        unevaluatedProperties: false
+
+    additionalProperties: false
+
+  reset-gpios:
+    maxItems: 1
+
+  powerdown-gpios:
+    description:
+      Active low GPIO connected to the /PDN pin. Forces the device into full
+      power-down mode when broght low. Pull this input to IOVDD for normal
+      operation.
+    maxItems: 1
+
+  odr-gpios:
+    description:
+      GPIO connected to ODR pin. Used to sample ADC data in minimum I/O mode.
+    maxItems: 1
+
+  adi,control-mode:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Describes whether the device is wired to an SPI interface or not. The
+      PIN/SPI pin on the device must be set accordingly, i.e., PIN/SPI must be
+      set to logic high for SPI Control Mode, low for Pin Control Mode. When
+      absent, implies the SPI interface configuration.
+    enum: [ spi-control-mode, pin-control-mode ]
+    default: spi-control-mode
+
+  adi,asrc-mode:
+    $ref: /schemas/types.yaml#/definitions/string
+    description:
+      Asynchronous Sample Rate Converter (ASRC) operation mode control input.
+      Describes whether the MODE pin is set to a high level (for master mode
+      operation) or to a low level (for slave mode operation).
+    enum: [ high, low ]
+    default: low
+
+  adi,dclkio:
+    description:
+      DCLK pin I/O direction control for when the device operates in Pin Control
+      Slave Mode or in SPI Control Mode. Describes if DEC0/DCLKIO pin is at a
+      high level (which configures DCLK as an output) or to set to a low level
+      (configuring DCLK for input).
+    enum: [ out, in ]
+    default: in
+
+  adi,dclkmode:
+    description:
+      DCLK mode control for when the device operates in Pin Control Slave Mode
+      or in SPI Control Mode. Describes whether the DEC1/DCLKMODE pin is set to
+      a high level (configuring the DCLK to operate in free running mode) or
+      to a low level (to configure DCLK to operate in gated mode).
+    enum: [ free-running, gated ]
+    default: gated
+
+required:
+  - compatible
+  - reg
+  - avdd5-supply
+  - dvdd5-supply
+  - iovdd-supply
+  - refin-supply
+  - clocks
+  - clock-names
+
+allOf:
+  - if:
+      not:
+        required:
+          - ldoin-supply
+    then:
+      required:
+        - avdd1v8-supply
+        - dvdd1v8-supply
+        - clkvdd-supply
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adc@0 {
+            compatible = "adi,ad4134";
+            reg = <0>;
+
+            spi-max-frequency = <1000000>;
+
+            reset-gpios = <&gpio0 86 GPIO_ACTIVE_LOW>;
+            odr-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
+            powerdown-gpios = <&gpio0 88 GPIO_ACTIVE_LOW>;
+
+            clocks = <&sys_clk>;
+            clock-names = "clkin";
+
+            avdd5-supply = <&avdd5>;
+            dvdd5-supply = <&dvdd5>;
+            iovdd-supply = <&iovdd>;
+            refin-supply = <&refin>;
+            avdd1v8-supply = <&avdd1v8>;
+            dvdd1v8-supply = <&dvdd1v8>;
+            clkvdd-supply = <&clkvdd>;
+
+            adi,control-mode = "spi-control-mode";
+            adi,asrc-mode = "low";
+            adi,dclkio = "in";
+            adi,dclkmode = "gated";
+
+            regulators {
+                vcm_reg: vcm-output {
+                    regulator-name = "ad4134-vcm";
+                };
+            };
+
+        };
+    };
+...
diff --git a/MAINTAINERS b/MAINTAINERS
index 9f3413e05c83..56bea005755d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1437,6 +1437,13 @@ F:	Documentation/ABI/testing/sysfs-bus-iio-adc-ad4130
 F:	Documentation/devicetree/bindings/iio/adc/adi,ad4130.yaml
 F:	drivers/iio/adc/ad4130.c
 
+ANALOG DEVICES INC AD4134 DRIVER
+M:	Marcelo Schmitt <marcelo.schmitt@analog.com>
+L:	linux-iio@vger.kernel.org
+S:	Supported
+W:	https://ez.analog.com/linux-software-drivers
+F:	Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
+
 ANALOG DEVICES INC AD4170-4 DRIVER
 M:	Marcelo Schmitt <marcelo.schmitt@analog.com>
 L:	linux-iio@vger.kernel.org
-- 
2.51.0

Re: [PATCH v1 1/3] dt-bindings: iio: adc: Add AD4134

[Conor Dooley]

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On Mon, Nov 10, 2025 at 09:45:18AM -0300, Marcelo Schmitt wrote:

> +  adi,control-mode:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    description:
> +      Describes whether the device is wired to an SPI interface or not. The

Can you explain how you don't automagically know this from what bus
you're on?

> +      PIN/SPI pin on the device must be set accordingly, i.e., PIN/SPI must be
> +      set to logic high for SPI Control Mode, low for Pin Control Mode. When
> +      absent, implies the SPI interface configuration.
> +    enum: [ spi-control-mode, pin-control-mode ]
> +    default: spi-control-mode
> +
> +  adi,asrc-mode:
> +    $ref: /schemas/types.yaml#/definitions/string
> +    description:
> +      Asynchronous Sample Rate Converter (ASRC) operation mode control input.
> +      Describes whether the MODE pin is set to a high level (for master mode
> +      operation) or to a low level (for slave mode operation).

I don't really get this one. If this is an input to the device that
controls behaviour (master v slave) why is an option needed too? Clearly
this is not a gpio but it seems like it could be one, in which case you'd
need some sort of asrc-gpios property. Is it not possible to read the
value of this setting out of the device's registers (maybe it's not when
there's no spi interface connected?)?
It's not used in your driver, so I can't look there easily to see what's
going on.

> +    enum: [ high, low ]
> +    default: low

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Re: [PATCH v1 1/3] dt-bindings: iio: adc: Add AD4134

[Marcelo Schmitt]

On 11/10, Conor Dooley wrote:
> On Mon, Nov 10, 2025 at 09:45:18AM -0300, Marcelo Schmitt wrote:
> 
> > +  adi,control-mode:
> > +    $ref: /schemas/types.yaml#/definitions/string
> > +    description:
> > +      Describes whether the device is wired to an SPI interface or not. The
> 
> Can you explain how you don't automagically know this from what bus
> you're on?

No. I mean, I should have realized we can imply SPI control mode from the bus node.
That's one fewer dt property :)

> 
> > +      PIN/SPI pin on the device must be set accordingly, i.e., PIN/SPI must be
> > +      set to logic high for SPI Control Mode, low for Pin Control Mode. When
> > +      absent, implies the SPI interface configuration.
> > +    enum: [ spi-control-mode, pin-control-mode ]
> > +    default: spi-control-mode
> > +
> > +  adi,asrc-mode:
> > +    $ref: /schemas/types.yaml#/definitions/string
> > +    description:
> > +      Asynchronous Sample Rate Converter (ASRC) operation mode control input.
> > +      Describes whether the MODE pin is set to a high level (for master mode
> > +      operation) or to a low level (for slave mode operation).
> 
> I don't really get this one. If this is an input to the device that
> controls behaviour (master v slave) why is an option needed too? Clearly
> this is not a gpio but it seems like it could be one, in which case you'd
> need some sort of asrc-gpios property. Is it not possible to read the
> value of this setting out of the device's registers (maybe it's not when
> there's no spi interface connected?)?
> It's not used in your driver, so I can't look there easily to see what's
> going on.

The MODE pin defines whether the ODR pin will behave as input or output.
Currently, there are no plans for supporting ODR as output but, software would
need to do different things to control the output data rate in that case.
Though, the MODE pin state can indeed be read from a register. Same for DCLK pin
I/O direction and DCLK mode. They are also readable from device's registers.
So, that would be 4 fewer dt props total. Well, yeah, if the device is not
connected to an SPI host (pin control mode) then we can't read those. There are
no plans for supporting this device outside an SPI bus, but we would then
need these properties (or a separate binding). Not sure what to do here. 
Do I drop or keep adi,asrc-mode?

The MODE pin is sampled only when the AD4134 is powered on so I don't think we
would benefit from having a GPIO connected to that (if we keep a property to
describe the MODE pin state).

> 
> > +    enum: [ high, low ]
> > +    default: low

Thanks,
Marcelo

Re: [PATCH v1 1/3] dt-bindings: iio: adc: Add AD4134

[Conor Dooley]

[-- Attachment #1: Type: text/plain, Size: 3798 bytes --]

On Thu, Nov 13, 2025 at 06:56:26PM -0300, Marcelo Schmitt wrote:
> On 11/10, Conor Dooley wrote:
> > On Mon, Nov 10, 2025 at 09:45:18AM -0300, Marcelo Schmitt wrote:
> > 
> > > +  adi,control-mode:
> > > +    $ref: /schemas/types.yaml#/definitions/string
> > > +    description:
> > > +      Describes whether the device is wired to an SPI interface or not. The
> > 
> > Can you explain how you don't automagically know this from what bus
> > you're on?
> 
> No. I mean, I should have realized we can imply SPI control mode from the bus node.
> That's one fewer dt property :)
> 
> > 
> > > +      PIN/SPI pin on the device must be set accordingly, i.e., PIN/SPI must be
> > > +      set to logic high for SPI Control Mode, low for Pin Control Mode. When
> > > +      absent, implies the SPI interface configuration.
> > > +    enum: [ spi-control-mode, pin-control-mode ]
> > > +    default: spi-control-mode
> > > +
> > > +  adi,asrc-mode:
> > > +    $ref: /schemas/types.yaml#/definitions/string
> > > +    description:
> > > +      Asynchronous Sample Rate Converter (ASRC) operation mode control input.
> > > +      Describes whether the MODE pin is set to a high level (for master mode
> > > +      operation) or to a low level (for slave mode operation).
> > 
> > I don't really get this one. If this is an input to the device that
> > controls behaviour (master v slave) why is an option needed too? Clearly
> > this is not a gpio but it seems like it could be one, in which case you'd
> > need some sort of asrc-gpios property. Is it not possible to read the
> > value of this setting out of the device's registers (maybe it's not when
> > there's no spi interface connected?)?
> > It's not used in your driver, so I can't look there easily to see what's
> > going on.
> 
> The MODE pin defines whether the ODR pin will behave as input or output.
> Currently, there are no plans for supporting ODR as output but, software would
> need to do different things to control the output data rate in that case.
> Though, the MODE pin state can indeed be read from a register. Same for DCLK pin
> I/O direction and DCLK mode. They are also readable from device's registers.
> So, that would be 4 fewer dt props total. Well, yeah, if the device is not
> connected to an SPI host (pin control mode) then we can't read those. There are
> no plans for supporting this device outside an SPI bus, but we would then
> need these properties (or a separate binding). Not sure what to do here. 
> Do I drop or keep adi,asrc-mode?

If you need it when not in spi mode, then keep it. For all of those
kinds of things, you probably can use the property to set things in spi
mode and to know they're set that way in !spi mode? In spi mode you
probably still need to be able to change the asrc mode, right? Or does
the device not permit being tristate (n/c I guess), and it has to be tied
low or high, and therefore software must just follow the pin setting?

> The MODE pin is sampled only when the AD4134 is powered on so I don't think we
> would benefit from having a GPIO connected to that (if we keep a property to
> describe the MODE pin state).

As in, it gets sampled once at power on, not continuously while powered
on? Technically, you can still do that with gpios, if you have
controllable supplies. Depends on use case I suppose and could be added
as an alternative later on if needed, so I wouldn't worry too much about
it when you're seemingly not even using what you have here in the driver.

Actually it might be worth actually checking for it in your driver, to
make sure that it is not being set to high, since you don't currently
support that?

I hope all that made sense, prob shouldn't be sending mails at 0145,
Conor.

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[PATCH v1 2/3] iio: adc: Initial support for AD4134

[Marcelo Schmitt]

AD4134 is a 24-bit, 4-channel, simultaneous sampling, precision
analog-to-digital converter (ADC). The device can be managed through SPI or
direct control of pin logical levels (pin control mode). The AD4134 design
also features a dedicated bus for ADC sample data output. Though, this
initial driver for AD4134 only supports usual SPI connections.

The different wiring configurations will likely require distinct software
to handle. So, the code specific to SPI is enclosed in ad4134-spi.c, while
functionality that may be useful to all wiring configuration is set into
ad4134-common.h and ad4134-common.c.

Add basic support for AD4134 that allows single-shot ADC sample read.

Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
---
 MAINTAINERS                     |   1 +
 drivers/iio/adc/Kconfig         |  15 ++
 drivers/iio/adc/Makefile        |   2 +
 drivers/iio/adc/ad4134-common.c | 200 ++++++++++++++++++++++
 drivers/iio/adc/ad4134-common.h | 132 +++++++++++++++
 drivers/iio/adc/ad4134-spi.c    | 287 ++++++++++++++++++++++++++++++++
 6 files changed, 637 insertions(+)
 create mode 100644 drivers/iio/adc/ad4134-common.c
 create mode 100644 drivers/iio/adc/ad4134-common.h
 create mode 100644 drivers/iio/adc/ad4134-spi.c

diff --git a/MAINTAINERS b/MAINTAINERS
index 56bea005755d..e709ec1d6717 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1443,6 +1443,7 @@ L:	linux-iio@vger.kernel.org
 S:	Supported
 W:	https://ez.analog.com/linux-software-drivers
 F:	Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
+F:	drivers/iio/adc/ad4134*
 
 ANALOG DEVICES INC AD4170-4 DRIVER
 M:	Marcelo Schmitt <marcelo.schmitt@analog.com>
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 31335af6b2f1..d2a8ab5c1102 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -99,6 +99,21 @@ config AD4130
 	  To compile this driver as a module, choose M here: the module will be
 	  called ad4130.
 
+config AD4134
+	tristate
+
+config AD4134_SPI
+	tristate "Analog Device AD4134 ADC Driver"
+	depends on SPI
+	select AD4134
+	select REGMAP_SPI
+	select CRC8
+	help
+	  Say yes here to build support for Analog Devices AD4134 SPI analog to
+	  digital converters (ADC).
+
+	  To compile this driver as a module, choose M here: the module will be
+	  called ad4134_spi.
 
 config AD4170_4
 	tristate "Analog Device AD4170-4 ADC Driver"
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index e5349b01e4d9..b98ecf9709a6 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -13,6 +13,8 @@ obj-$(CONFIG_AD4000) += ad4000.o
 obj-$(CONFIG_AD4030) += ad4030.o
 obj-$(CONFIG_AD4080) += ad4080.o
 obj-$(CONFIG_AD4130) += ad4130.o
+obj-$(CONFIG_AD4134) += ad4134-common.o
+obj-$(CONFIG_AD4134_SPI) += ad4134-spi.o
 obj-$(CONFIG_AD4170_4) += ad4170-4.o
 obj-$(CONFIG_AD4695) += ad4695.o
 obj-$(CONFIG_AD4851) += ad4851.o
diff --git a/drivers/iio/adc/ad4134-common.c b/drivers/iio/adc/ad4134-common.c
new file mode 100644
index 000000000000..05332a640926
--- /dev/null
+++ b/drivers/iio/adc/ad4134-common.c
@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Analog Devices, Inc.
+ * Author: Marcelo Schmitt <marcelo.schmitt@analog.com>
+ */
+
+#include <linux/clk.h>
+#include <linux/crc8.h>
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/iio/iio.h>
+#include <linux/module.h>
+#include <linux/property.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#include "ad4134-common.h"
+
+const struct ad4134_chip_info ad4134_chip_info = {
+	.name = "ad4134",
+};
+EXPORT_SYMBOL_NS_GPL(ad4134_chip_info, "IIO_AD4134");
+
+static const struct regmap_range ad4134_regmap_rd_range[] = {
+	regmap_reg_range(AD4134_IFACE_CONFIG_A_REG, AD4134_SILICON_REV_REG),
+	regmap_reg_range(AD4134_SCRATCH_PAD_REG, AD4134_PW_DOWN_CTRL_REG),
+	regmap_reg_range(AD4134_DEVICE_STATUS_REG, AD4134_AIN_OR_ERROR_REG),
+	regmap_reg_range(AD4134_CH_VREG(0), AD4134_CH_VREG(AD4134_NUM_CHANNELS)),
+};
+
+static const struct regmap_range ad4134_regmap_wr_range[] = {
+	regmap_reg_range(AD4134_IFACE_CONFIG_A_REG, AD4134_DEVICE_CONFIG_REG),
+	regmap_reg_range(AD4134_SCRATCH_PAD_REG, AD4134_SCRATCH_PAD_REG),
+	regmap_reg_range(AD4134_STREAM_MODE_REG, AD4134_PW_DOWN_CTRL_REG),
+	regmap_reg_range(AD4134_ODR_VAL_INT_LSB_REG, AD4134_CH3_OFFSET_MSB_REG),
+};
+
+const struct regmap_access_table ad4134_regmap_rd_table = {
+	.yes_ranges = ad4134_regmap_rd_range,
+	.n_yes_ranges = ARRAY_SIZE(ad4134_regmap_rd_range),
+};
+EXPORT_SYMBOL_NS_GPL(ad4134_regmap_rd_table, "IIO_AD4134");
+
+const struct regmap_access_table ad4134_regmap_wr_table = {
+	.yes_ranges = ad4134_regmap_wr_range,
+	.n_yes_ranges = ARRAY_SIZE(ad4134_regmap_wr_range),
+};
+EXPORT_SYMBOL_NS_GPL(ad4134_regmap_wr_table, "IIO_AD4134");
+
+static const char * const ad4143_regulator_names[] = {
+	"avdd5", "dvdd5", "iovdd", "refin",	/* Required supplies */
+	"avdd1v8", "dvdd1v8", "clkvdd",		/* Required if ldoin not provided */
+	"ldoin",
+};
+
+static const char *const ad4134_clk_sel[] = {
+	"xtal1-xtal2", "clkin"
+};
+
+static int ad4134_clock_select(struct ad4134_state *st)
+{
+	struct device *dev = st->dev;
+	struct clk *sys_clk;
+	int ret;
+
+	ret = device_property_match_property_string(dev, "clock-names",
+						    ad4134_clk_sel,
+						    ARRAY_SIZE(ad4134_clk_sel));
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "failed to find external clock\n");
+
+	sys_clk = devm_clk_get_enabled(dev, ad4134_clk_sel[ret]);
+	if (IS_ERR(sys_clk))
+		return dev_err_probe(dev, PTR_ERR(sys_clk),
+				     "failed to get %s external clock\n",
+				     ad4134_clk_sel[ret]);
+
+	st->sys_clk_rate = clk_get_rate(sys_clk);
+	if (st->sys_clk_rate != AD4134_EXT_CLOCK_MHZ)
+		dev_warn(dev, "invalid external clock frequency %lu\n",
+			 st->sys_clk_rate);
+
+	return 0;
+}
+
+int ad4134_probe(struct device *dev, const struct ad4134_bus_info *bus_info)
+{
+	bool use_internal_ldo_retulator;
+	struct gpio_desc *reset_gpio;
+	struct iio_dev *indio_dev;
+	struct ad4134_state *st;
+	int ret;
+
+	indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
+	if (!indio_dev)
+		return -ENOMEM;
+
+	st = iio_priv(indio_dev);
+	st->dev = dev;
+
+	indio_dev->name = bus_info->chip_info->name;
+
+	/* Required regulators */
+	ret = devm_regulator_bulk_get_enable(dev, 3, ad4143_regulator_names);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to enable power supplies\n");
+
+	/* Required regulator that we need to read the voltage */
+	ret = devm_regulator_get_enable_read_voltage(dev, "refin");
+	if (ret < 0)
+		return dev_err_probe(dev, ret, "failed to get REFIN voltage.\n");
+
+	st->refin_mv = ret / MILLI;
+
+	/*
+	 * If ldoin is not provided, then avdd1v8, dvdd1v8, and clkvdd are
+	 * required.
+	 */
+	ret = devm_regulator_get_enable_optional(dev, "ldoin");
+	if (ret < 0 && ret != -ENODEV)
+		return dev_err_probe(dev, ret, "failed to enable ldoin supply\n");
+
+	use_internal_ldo_retulator = ret == 0;
+
+	if (!use_internal_ldo_retulator) {
+		ret = devm_regulator_get_enable(dev, "avdd1v8");
+		if (ret < 0)
+			return dev_err_probe(dev, ret,
+					     "failed to enable avdd1v8 supply\n");
+
+		ret = devm_regulator_get_enable(dev, "dvdd1v8");
+		if (ret < 0)
+			return dev_err_probe(dev, ret,
+					     "failed to enable dvdd1v8 supply\n");
+
+		ret = devm_regulator_get_enable(dev, "clkvdd");
+		if (ret < 0)
+			return dev_err_probe(dev, ret,
+					     "failed to enable clkvdd supply\n");
+	}
+
+	ret = ad4134_clock_select(st);
+	if (ret)
+		return ret;
+
+	crc8_populate_msb(ad4134_spi_crc_table, AD4134_SPI_CRC_POLYNOM);
+
+	reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(reset_gpio),
+				     "failed to find reset GPIO\n");
+
+	if (reset_gpio) {
+		fsleep(AD4134_RESET_TIME_US);
+		gpiod_set_value_cansleep(reset_gpio, 0);
+	}
+
+	ret = bus_info->bops->config_iio_dev(indio_dev);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to config IIO device\n");
+
+	st->regmap = bus_info->bops->init_regmap(st);
+	if (IS_ERR(st->regmap))
+		return dev_err_probe(st->dev, PTR_ERR(st->regmap),
+				     "failed to initialize regmap");
+
+	/* wiring/configuration specific setup */
+	ret = bus_info->bops->setup(st);
+	if (ret)
+		return dev_err_probe(dev, ret, "failed to setup bus\n");
+
+	/* Bump precision to 24-bit */
+	st->current_scan_type = AD4134_DATA_PACKET_24BIT_FRAME;
+	ret = regmap_update_bits(st->regmap, AD4134_DATA_PACKET_CONFIG_REG,
+				 AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
+				 FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
+					    st->current_scan_type));
+	if (ret)
+		return ret;
+
+	/* Set high performance power mode */
+	ret = regmap_update_bits(st->regmap, AD4134_DEVICE_CONFIG_REG,
+				 AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
+				 FIELD_PREP(AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
+					    AD4134_POWER_MODE_HIGH_PERF));
+	if (ret)
+		return ret;
+
+	return devm_iio_device_register(dev, indio_dev);
+}
+EXPORT_SYMBOL_NS_GPL(ad4134_probe, "IIO_AD4134");
+
+unsigned char ad4134_spi_crc_table[CRC8_TABLE_SIZE];
+EXPORT_SYMBOL_NS_GPL(ad4134_spi_crc_table, "IIO_AD4134");
+
+MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt@analog.com>");
+MODULE_DESCRIPTION("Analog Devices AD4134 driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/iio/adc/ad4134-common.h b/drivers/iio/adc/ad4134-common.h
new file mode 100644
index 000000000000..c0a553d827c9
--- /dev/null
+++ b/drivers/iio/adc/ad4134-common.h
@@ -0,0 +1,132 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Analog Devices AD4134 and similar ADCs common definitions and properties
+ * Copyright (C) 2025 Analog Devices, Inc.
+ * Author: Marcelo Schmitt <marcelo.schmitt@analog.com>
+ */
+
+#ifndef __DRIVERS_IIO_ADC_AD4134_COMMON_H__
+#define __DRIVERS_IIO_ADC_AD4134_COMMON_H__
+
+#include <linux/array_size.h>
+#include <linux/bits.h>
+#include <linux/compiler_attributes.h>
+#include <linux/crc8.h>
+#include <linux/iio/iio.h>
+#include <linux/units.h>
+#include <linux/types.h>
+
+#define AD4134_RESET_TIME_US			(10 * MICRO)
+
+#define AD4134_REG_READ_MASK			BIT(7)
+#define AD4134_SPI_MAX_XFER_LEN			3
+
+#define AD4134_EXT_CLOCK_MHZ			(48 * MEGA)
+
+#define AD4134_NUM_CHANNELS			4
+
+#define AD4134_IFACE_CONFIG_A_REG		0x00
+#define AD4134_IFACE_CONFIG_B_REG		0x01
+#define AD4134_IFACE_CONFIG_B_SINGLE_INSTR	BIT(7)
+
+#define AD4134_DEVICE_CONFIG_REG		0x02
+#define AD4134_DEVICE_CONFIG_POWER_MODE_MASK	BIT(0)
+#define AD4134_POWER_MODE_HIGH_PERF		0x1
+
+#define AD4134_SILICON_REV_REG			0x07
+#define AD4134_SCRATCH_PAD_REG			0x0A
+#define AD4134_STREAM_MODE_REG			0x0E
+#define AD4134_SDO_PIN_SRC_SEL_REG		0x10
+#define AD4134_SDO_PIN_SRC_SEL_SDO_SEL_MASK	BIT(2)
+
+#define AD4134_DATA_PACKET_CONFIG_REG		0x11
+#define AD4134_DATA_PACKET_CONFIG_FRAME_MASK	GENMASK(5, 4)
+#define AD4134_DATA_PACKET_16BIT_FRAME		0x0
+#define AD4134_DATA_PACKET_16BIT_CRC6_FRAME	0x1
+#define AD4134_DATA_PACKET_24BIT_FRAME		0x2
+#define AD4134_DATA_PACKET_24BIT_CRC6_FRAME	0x3
+
+#define AD4134_DIG_IF_CFG_REG			0x12
+#define AD4134_DIF_IF_CFG_FORMAT_MASK		GENMASK(1, 0)
+#define AD4134_DATA_FORMAT_SINGLE_CH_MODE	0x0
+
+#define AD4134_PW_DOWN_CTRL_REG			0x13
+#define AD4134_DEVICE_STATUS_REG		0x15
+#define AD4134_ODR_VAL_INT_LSB_REG		0x16
+#define AD4134_CH3_OFFSET_MSB_REG		0x3E
+#define AD4134_AIN_OR_ERROR_REG			0x48
+
+#define AD4134_CH_VREG(x)			((x) + 0x50) /* chanX virtual register */
+#define AD4134_VREG_CH(x)			((x) - 0x50) /* chan of virtual reg X */
+
+#define AD4134_SPI_CRC_POLYNOM			0x07
+#define AD4134_SPI_CRC_INIT_VALUE		0xA5
+extern unsigned char ad4134_spi_crc_table[CRC8_TABLE_SIZE];
+
+extern const struct regmap_access_table ad4134_regmap_rd_table;
+extern const struct regmap_access_table ad4134_regmap_wr_table;
+
+#define AD4134_SCAN_TYPE(_realbits, _storebits) {				\
+	.sign = 's',								\
+	.realbits = (_realbits),						\
+	.storagebits = (_storebits),						\
+	.shift = ((_storebits) - (_realbits)),					\
+	.endianness = IIO_BE							\
+}
+
+struct iio_scan_type ad4134_scan_types[] = {
+	AD4134_SCAN_TYPE(16, 16),
+	AD4134_SCAN_TYPE(16, 24),
+	AD4134_SCAN_TYPE(24, 24),
+	AD4134_SCAN_TYPE(24, 32),
+};
+
+#define AD4134_CHANNEL(_index) {						\
+	.type = IIO_VOLTAGE,							\
+	.indexed = 1,								\
+	.channel = (_index),							\
+	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
+	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
+	.scan_index = (_index),							\
+	.has_ext_scan_type = 1,							\
+	.ext_scan_type = ad4134_scan_types,					\
+	.num_ext_scan_type = ARRAY_SIZE(ad4134_scan_types)			\
+}
+
+struct device;
+
+struct ad4134_state {
+	struct device *dev;
+	struct regmap *regmap;
+	unsigned long sys_clk_rate;
+	int refin_mv;
+	struct gpio_desc *odr_gpio;
+	unsigned int current_scan_type;
+	/*
+	 * DMA (thus cache coherency maintenance) requires the transfer buffers
+	 * to live in their own cache lines.
+	 */
+	u8 rx_buf[AD4134_SPI_MAX_XFER_LEN] __aligned(IIO_DMA_MINALIGN);
+	u8 tx_buf[AD4134_SPI_MAX_XFER_LEN];
+};
+
+struct ad4134_chip_info {
+	const char *name;
+};
+
+extern const struct ad4134_chip_info ad4134_chip_info;
+
+struct ad4134_bus_ops {
+	int (*config_iio_dev)(struct iio_dev *indio_dev);
+	struct regmap *(*init_regmap)(struct ad4134_state *st);
+	int (*setup)(struct ad4134_state *st);
+};
+
+struct ad4134_bus_info {
+	const struct ad4134_chip_info *chip_info;
+	const struct ad4134_bus_ops *bops;
+};
+
+int ad4134_probe(struct device *dev, const struct ad4134_bus_info *bus_info);
+
+#endif /* __DRIVERS_IIO_ADC_AD4134_COMMON_H__ */
diff --git a/drivers/iio/adc/ad4134-spi.c b/drivers/iio/adc/ad4134-spi.c
new file mode 100644
index 000000000000..7d0749e5c084
--- /dev/null
+++ b/drivers/iio/adc/ad4134-spi.c
@@ -0,0 +1,287 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Copyright (C) 2025 Analog Devices, Inc.
+ * Author: Marcelo Schmitt <marcelo.schmitt@analog.com>
+ */
+
+#include <linux/bitfield.h>
+#include <linux/bitops.h>
+#include <linux/bits.h>
+#include <linux/crc8.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/err.h>
+#include <linux/gpio/consumer.h>
+#include <linux/iio/iio.h>
+#include <linux/iio/types.h>
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/regmap.h>
+#include <linux/types.h>
+#include <linux/unaligned.h>
+
+#include "ad4134-common.h"
+
+static const struct iio_chan_spec ad4134_chan_set[] = {
+	AD4134_CHANNEL(0),
+	AD4134_CHANNEL(1),
+	AD4134_CHANNEL(2),
+	AD4134_CHANNEL(3),
+};
+
+static int ad4134_calc_spi_crc(u8 inst, u8 data)
+{
+	u8 buf[] = {inst, data};
+
+	return crc8(ad4134_spi_crc_table, buf, ARRAY_SIZE(buf),
+		    AD4134_SPI_CRC_INIT_VALUE);
+}
+
+static void ad4134_prepare_spi_tx_buf(u8 inst, u8 data, u8 *buf)
+{
+	buf[0] = inst;
+	buf[1] = data;
+	buf[2] = ad4134_calc_spi_crc(inst, data);
+}
+
+static int ad4134_reg_write(void *context, unsigned int reg, unsigned int val)
+{
+	struct ad4134_state *st = context;
+	struct spi_device *spi = to_spi_device(st->dev);
+	struct spi_transfer xfer = {
+		.tx_buf = st->tx_buf,
+		.rx_buf = st->rx_buf,
+		.len = AD4134_SPI_MAX_XFER_LEN,
+	};
+	int ret;
+
+	ad4134_prepare_spi_tx_buf(reg, val, st->tx_buf);
+
+	ret = spi_sync_transfer(spi, &xfer, 1);
+	if (ret)
+		return ret;
+
+	if (st->rx_buf[2] != st->tx_buf[2])
+		dev_dbg(st->dev, "reg write CRC check failed\n");
+
+	return 0;
+}
+
+static int ad4134_data_read(struct ad4134_state *st, unsigned int reg,
+			    unsigned int *val)
+{
+	struct spi_device *spi = to_spi_device(st->dev);
+	struct iio_scan_type *scan_type = &ad4134_scan_types[st->current_scan_type];
+	unsigned int i;
+	int ret;
+
+	/*
+	 * Data from all four channels is serialized and output on SDO. Read
+	 * them all but keep only the requested data.
+	 */
+	for (i = 0; i < ARRAY_SIZE(ad4134_chan_set); i++) {
+		ret = spi_write_then_read(spi, NULL, 0, st->rx_buf,
+					  BITS_TO_BYTES(scan_type->storagebits));
+		if (ret)
+			return ret;
+
+		if (i != AD4134_VREG_CH(reg))
+			continue;
+
+		if (scan_type->realbits == 16)
+			*val = get_unaligned_be16(st->rx_buf);
+		else
+			*val = get_unaligned_be24(st->rx_buf);
+
+		*val >>= scan_type->shift;
+	}
+
+	return 0;
+}
+
+static int ad4134_reg_read(void *context, unsigned int reg, unsigned int *val)
+{
+	struct ad4134_state *st = context;
+	struct spi_device *spi = to_spi_device(st->dev);
+	struct spi_transfer xfer = {
+		.tx_buf = st->tx_buf,
+		.rx_buf = st->rx_buf,
+		.len = AD4134_SPI_MAX_XFER_LEN,
+	};
+	unsigned int inst;
+	int ret;
+
+	if (reg >= AD4134_CH_VREG(0))
+		return ad4134_data_read(st, reg, val);
+
+	inst = AD4134_REG_READ_MASK | reg;
+	ad4134_prepare_spi_tx_buf(inst, 0, st->tx_buf);
+
+	ret = spi_sync_transfer(spi, &xfer, 1);
+	if (ret)
+		return ret;
+
+	*val = st->rx_buf[1];
+
+	/* Check CRC */
+	if (st->rx_buf[2] != st->tx_buf[2])
+		dev_dbg(st->dev, "reg read CRC check failed\n");
+
+	return 0;
+}
+
+static const struct regmap_config ad4134_regmap_config = {
+	.reg_read = ad4134_reg_read,
+	.reg_write = ad4134_reg_write,
+	.rd_table = &ad4134_regmap_rd_table,
+	.wr_table = &ad4134_regmap_wr_table,
+	.max_register = AD4134_CH_VREG(ARRAY_SIZE(ad4134_chan_set)),
+};
+
+static int ad4134_read_raw(struct iio_dev *indio_dev,
+			   struct iio_chan_spec const *chan,
+			   int *val, int *val2, long info)
+{
+	struct ad4134_state *st = iio_priv(indio_dev);
+	const struct iio_scan_type *scan_type;
+	int ret;
+
+	scan_type = iio_get_current_scan_type(indio_dev, chan);
+	if (IS_ERR(scan_type))
+		return PTR_ERR(scan_type);
+
+	switch (info) {
+	case IIO_CHAN_INFO_RAW:
+		gpiod_set_value_cansleep(st->odr_gpio, 1);
+		fsleep(1);
+		gpiod_set_value_cansleep(st->odr_gpio, 0);
+		ret = regmap_read(st->regmap, AD4134_CH_VREG(chan->channel), val);
+		if (ret)
+			return ret;
+
+		return IIO_VAL_INT;
+	case IIO_CHAN_INFO_SCALE:
+		*val = st->refin_mv;
+		*val2 = scan_type->realbits - (scan_type->sign == 's' ? 1 : 0);
+
+		return IIO_VAL_FRACTIONAL_LOG2;
+	default:
+		return -EINVAL;
+	}
+}
+
+static int ad4134_reg_access(struct iio_dev *indio_dev, unsigned int reg,
+			     unsigned int writeval, unsigned int *readval)
+{
+	struct ad4134_state *st = iio_priv(indio_dev);
+
+	if (readval)
+		return regmap_read(st->regmap, reg, readval);
+
+	return regmap_write(st->regmap, reg, writeval);
+}
+
+static struct regmap *ad4134_minimum_io_regmap_init(struct ad4134_state *st)
+{
+	return devm_regmap_init(st->dev, NULL, st, &ad4134_regmap_config);
+}
+
+static int ad4134_get_current_scan_type(const struct iio_dev *indio_dev,
+					const struct iio_chan_spec *chan)
+{
+	struct ad4134_state *st = iio_priv(indio_dev);
+
+	return st->current_scan_type;
+}
+
+static int ad4134_min_io_mode_setup(struct ad4134_state *st)
+{
+	struct device *dev = st->dev;
+	int ret;
+
+	st->odr_gpio = devm_gpiod_get(dev, "odr", GPIOD_OUT_LOW);
+	if (IS_ERR(st->odr_gpio))
+		return dev_err_probe(dev, PTR_ERR(st->odr_gpio),
+				     "failed to get ODR GPIO\n");
+
+	ret = regmap_update_bits(st->regmap, AD4134_DIG_IF_CFG_REG,
+				 AD4134_DIF_IF_CFG_FORMAT_MASK,
+				 FIELD_PREP(AD4134_DIF_IF_CFG_FORMAT_MASK,
+					    AD4134_DATA_FORMAT_SINGLE_CH_MODE));
+	if (ret)
+		return ret;
+
+	ret = regmap_set_bits(st->regmap, AD4134_SDO_PIN_SRC_SEL_REG,
+			      AD4134_SDO_PIN_SRC_SEL_SDO_SEL_MASK);
+	if (ret)
+		return ret;
+
+	return regmap_set_bits(st->regmap, AD4134_IFACE_CONFIG_B_REG,
+			       AD4134_IFACE_CONFIG_B_SINGLE_INSTR);
+}
+
+static const struct iio_info ad4134_info = {
+	.read_raw = ad4134_read_raw,
+	.get_current_scan_type = ad4134_get_current_scan_type,
+	.debugfs_reg_access = ad4134_reg_access,
+};
+
+static int ad4134_config_iio_dev(struct iio_dev *indio_dev)
+{
+	indio_dev->channels = ad4134_chan_set;
+	indio_dev->num_channels = ARRAY_SIZE(ad4134_chan_set);
+
+	indio_dev->modes = INDIO_DIRECT_MODE;
+	indio_dev->info = &ad4134_info;
+
+	return 0;
+};
+
+static const struct ad4134_bus_ops ad4134_min_io_bops = {
+	.config_iio_dev = &ad4134_config_iio_dev,
+	.init_regmap = &ad4134_minimum_io_regmap_init,
+	.setup = &ad4134_min_io_mode_setup,
+};
+
+static const struct ad4134_bus_info ad4134_min_io_bus_info = {
+	.chip_info = &ad4134_chip_info,
+	.bops = &ad4134_min_io_bops,
+};
+
+static int ad4134_spi_probe(struct spi_device *spi)
+{
+	const struct ad4134_bus_info *bus_info;
+
+	bus_info = spi_get_device_match_data(spi);
+	if (!bus_info)
+		return -EINVAL;
+
+	return ad4134_probe(&spi->dev, bus_info);
+}
+
+static const struct spi_device_id ad4134_id[] = {
+	{ "ad4134", (kernel_ulong_t)&ad4134_min_io_bus_info },
+	{ },
+};
+MODULE_DEVICE_TABLE(spi, ad4134_id);
+
+static const struct of_device_id ad4134_of_match[] = {
+	{ .compatible = "adi,ad4134", .data = &ad4134_min_io_bus_info },
+	{ }
+};
+MODULE_DEVICE_TABLE(of, ad4134_of_match);
+
+static struct spi_driver ad4134_driver = {
+	.driver = {
+		.name = "ad4134",
+		.of_match_table = ad4134_of_match,
+	},
+	.probe = ad4134_spi_probe,
+	.id_table = ad4134_id,
+};
+module_spi_driver(ad4134_driver);
+
+MODULE_AUTHOR("Marcelo Schmitt <marcelo.schmitt@analog.com>");
+MODULE_DESCRIPTION("Analog Devices AD4134 SPI driver");
+MODULE_LICENSE("GPL");
+MODULE_IMPORT_NS("IIO_AD4134");
-- 
2.51.0

Re: [PATCH v1 2/3] iio: adc: Initial support for AD4134

[Andy Shevchenko]

On Mon, Nov 10, 2025 at 09:45:40AM -0300, Marcelo Schmitt wrote:
> AD4134 is a 24-bit, 4-channel, simultaneous sampling, precision
> analog-to-digital converter (ADC). The device can be managed through SPI or
> direct control of pin logical levels (pin control mode). The AD4134 design
> also features a dedicated bus for ADC sample data output. Though, this
> initial driver for AD4134 only supports usual SPI connections.
> 
> The different wiring configurations will likely require distinct software
> to handle.

> So, the code specific to SPI is enclosed in ad4134-spi.c, while
> functionality that may be useful to all wiring configuration is set into
> ad4134-common.h and ad4134-common.c.

This part is good for comment or cover letter, I dunno what it gives to the Git
history. Perhaps you want to rephrase it somehow?

> Add basic support for AD4134 that allows single-shot ADC sample read.

Below is my review based on the assumption that there is a good justification
for a brand new driver.

...

> +obj-$(CONFIG_AD4134_SPI) += ad4134-spi.o

This can be split also to the separate patch.

...

Please, follow IWYU principle, many are missing here.

+ array_size.h
+ bitfield.h

> +#include <linux/clk.h>
> +#include <linux/crc8.h>
> +#include <linux/delay.h>

> +#include <linux/device.h>

I don't see the use of this, rather dev_printk.h should be put here.

> +#include <linux/err.h>

+ export.h

> +#include <linux/gpio/consumer.h>
> +#include <linux/iio/iio.h>
> +#include <linux/module.h>
> +#include <linux/property.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>

+ types.h

...

> +static const char * const ad4143_regulator_names[] = {
> +	"avdd5", "dvdd5", "iovdd", "refin",	/* Required supplies */
> +	"avdd1v8", "dvdd1v8", "clkvdd",		/* Required if ldoin not provided */
> +	"ldoin",

Make them equal in count (2 lines by 4 in each sounds really good choice
to me).

> +};

...

> +static const char *const ad4134_clk_sel[] = {
> +	"xtal1-xtal2", "clkin"

Leave trailing comma here.

> +};

...

> +#define __DRIVERS_IIO_ADC_AD4134_COMMON_H__

Do we need DRIVERS_ part?

...

> +#include <linux/array_size.h>
> +#include <linux/bits.h>

> +#include <linux/compiler_attributes.h>

No need when we have types.h listed.

> +#include <linux/crc8.h>

Is this being used?

> +#include <linux/iio/iio.h>

+ regmap.h

> +#include <linux/units.h>
> +#include <linux/types.h>

Again, follow IWYU.

...

> +#define AD4134_RESET_TIME_US			(10 * MICRO)

We have USEC_PER_SEC (include time.h for that).

...

> +#define AD4134_EXT_CLOCK_MHZ			(48 * MEGA)

We have HZ_PER_MHZ.

...

> +#define AD4134_SCAN_TYPE(_realbits, _storebits) {				\
> +	.sign = 's',								\
> +	.realbits = (_realbits),						\
> +	.storagebits = (_storebits),						\
> +	.shift = ((_storebits) - (_realbits)),					\
> +	.endianness = IIO_BE							\

Missing comma, this might make an addition churn in the future changes.

> +}

...

> +struct device;

What about struct gpio_desc?

...


> +#endif /* __DRIVERS_IIO_ADC_AD4134_COMMON_H__ */

...

+ array_size.h

> +#include <linux/bitfield.h>
> +#include <linux/bitops.h>
> +#include <linux/bits.h>
> +#include <linux/crc8.h>

> +#include <linux/device.h>

Is it being used? Perhaps dev_printk.h is enough?

> +#include <linux/delay.h>
> +#include <linux/err.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/iio/iio.h>
> +#include <linux/iio/types.h>
> +#include <linux/module.h>

+ mod_devicetable.h

> +#include <linux/spi/spi.h>
> +#include <linux/regmap.h>
> +#include <linux/types.h>
> +#include <linux/unaligned.h>

...

> +static int ad4134_calc_spi_crc(u8 inst, u8 data)
> +{
> +	u8 buf[] = {inst, data};

Better

	u8 buf[] = { inst, data };

> +	return crc8(ad4134_spi_crc_table, buf, ARRAY_SIZE(buf),
> +		    AD4134_SPI_CRC_INIT_VALUE);
> +}

...

> +static const struct spi_device_id ad4134_id[] = {
> +	{ "ad4134", (kernel_ulong_t)&ad4134_min_io_bus_info },
> +	{ },

No comma for the terminator entry. It's even inconsistent with the below ID
table.

> +};
> +MODULE_DEVICE_TABLE(spi, ad4134_id);
> +
> +static const struct of_device_id ad4134_of_match[] = {
> +	{ .compatible = "adi,ad4134", .data = &ad4134_min_io_bus_info },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(of, ad4134_of_match);

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 2/3] iio: adc: Initial support for AD4134

[Jonathan Cameron]

On Mon, 10 Nov 2025 09:45:40 -0300
Marcelo Schmitt <marcelo.schmitt@analog.com> wrote:

> AD4134 is a 24-bit, 4-channel, simultaneous sampling, precision
> analog-to-digital converter (ADC). The device can be managed through SPI or
> direct control of pin logical levels (pin control mode). The AD4134 design
> also features a dedicated bus for ADC sample data output. Though, this
> initial driver for AD4134 only supports usual SPI connections.
> 
> The different wiring configurations will likely require distinct software
> to handle. So, the code specific to SPI is enclosed in ad4134-spi.c, while
> functionality that may be useful to all wiring configuration is set into
> ad4134-common.h and ad4134-common.c.

'maybe' isn't usually a justification for a split.  If that code
was on list even as an RFC before merging  I'd be fine with this, but if it is
something we might never see upstream, then squash the abstractions for
now. Those then end up being introduced as a precursor part of the patch
set that gives them a reason to exist.

> 
> Add basic support for AD4134 that allows single-shot ADC sample read.
> 
> Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
A few other comments inline,

Thanks, J
> diff --git a/drivers/iio/adc/ad4134-common.c b/drivers/iio/adc/ad4134-common.c
> new file mode 100644
> index 000000000000..05332a640926
> --- /dev/null
> +++ b/drivers/iio/adc/ad4134-common.c

> +
> +static const char *const ad4134_clk_sel[] = {
> +	"xtal1-xtal2", "clkin"
> +};
> +
> +static int ad4134_clock_select(struct ad4134_state *st)
> +{
> +	struct device *dev = st->dev;
> +	struct clk *sys_clk;
> +	int ret;
> +
> +	ret = device_property_match_property_string(dev, "clock-names",
> +						    ad4134_clk_sel,
> +						    ARRAY_SIZE(ad4134_clk_sel));
> +	if (ret < 0)
> +		return dev_err_probe(dev, ret, "failed to find external clock\n");
> +
> +	sys_clk = devm_clk_get_enabled(dev, ad4134_clk_sel[ret]);
> +	if (IS_ERR(sys_clk))
> +		return dev_err_probe(dev, PTR_ERR(sys_clk),
> +				     "failed to get %s external clock\n",
> +				     ad4134_clk_sel[ret]);
This is a somewhat unusual approach. More common to just trying getting
an optional clock and if that fails try the other one.

devm_clk_get_optional_enabled()


> +
> +	st->sys_clk_rate = clk_get_rate(sys_clk);
> +	if (st->sys_clk_rate != AD4134_EXT_CLOCK_MHZ)
> +		dev_warn(dev, "invalid external clock frequency %lu\n",
> +			 st->sys_clk_rate);
> +
> +	return 0;
> +}

> diff --git a/drivers/iio/adc/ad4134-common.h b/drivers/iio/adc/ad4134-common.h
> new file mode 100644
> index 000000000000..c0a553d827c9
> --- /dev/null
> +++ b/drivers/iio/adc/ad4134-common.h

> +
> +#define AD4134_CH_VREG(x)			((x) + 0x50) /* chanX virtual register */
> +#define AD4134_VREG_CH(x)			((x) - 0x50) /* chan of virtual reg X */

Add a comment or two on what virtual registers are for.

> +struct iio_scan_type ad4134_scan_types[] = {
> +	AD4134_SCAN_TYPE(16, 16),
> +	AD4134_SCAN_TYPE(16, 24),

There are no buffer in here so can type ends up meaning little.
If this eventually doesn't become useful, storage bits must be a power of 2 * 8
So can't be 24.  

> +	AD4134_SCAN_TYPE(24, 24),
> +	AD4134_SCAN_TYPE(24, 32),
> +};
> +
> +#define AD4134_CHANNEL(_index) {						\
> +	.type = IIO_VOLTAGE,							\
> +	.indexed = 1,								\
> +	.channel = (_index),							\
> +	.info_mask_separate = BIT(IIO_CHAN_INFO_RAW),				\
> +	.info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),			\
> +	.scan_index = (_index),							\
> +	.has_ext_scan_type = 1,							\
> +	.ext_scan_type = ad4134_scan_types,					\
> +	.num_ext_scan_type = ARRAY_SIZE(ad4134_scan_types)			\
> +}

> diff --git a/drivers/iio/adc/ad4134-spi.c b/drivers/iio/adc/ad4134-spi.c
> new file mode 100644
> index 000000000000..7d0749e5c084
> --- /dev/null
> +++ b/drivers/iio/adc/ad4134-spi.c
> @@ -0,0 +1,287 @@

> +
> +#include "ad4134-common.h"

> +static int ad4134_reg_write(void *context, unsigned int reg, unsigned int val)
> +{
> +	struct ad4134_state *st = context;
> +	struct spi_device *spi = to_spi_device(st->dev);
> +	struct spi_transfer xfer = {
> +		.tx_buf = st->tx_buf,
> +		.rx_buf = st->rx_buf,
> +		.len = AD4134_SPI_MAX_XFER_LEN,
> +	};
> +	int ret;
> +
> +	ad4134_prepare_spi_tx_buf(reg, val, st->tx_buf);
> +
> +	ret = spi_sync_transfer(spi, &xfer, 1);
> +	if (ret)
> +		return ret;
> +
> +	if (st->rx_buf[2] != st->tx_buf[2])
> +		dev_dbg(st->dev, "reg write CRC check failed\n");
> +
> +	return 0;
> +}
> +
> +static int ad4134_data_read(struct ad4134_state *st, unsigned int reg,
> +			    unsigned int *val)
> +{
> +	struct spi_device *spi = to_spi_device(st->dev);
> +	struct iio_scan_type *scan_type = &ad4134_scan_types[st->current_scan_type];
> +	unsigned int i;
> +	int ret;
> +
> +	/*
> +	 * Data from all four channels is serialized and output on SDO. Read
> +	 * them all but keep only the requested data.

I'm failing to spot this mode described on the datasheet.  Could you
provide a reference section?

> +	 */
> +	for (i = 0; i < ARRAY_SIZE(ad4134_chan_set); i++) {
> +		ret = spi_write_then_read(spi, NULL, 0, st->rx_buf,
> +					  BITS_TO_BYTES(scan_type->storagebits));
> +		if (ret)
> +			return ret;
> +
> +		if (i != AD4134_VREG_CH(reg))
> +			continue;
> +
> +		if (scan_type->realbits == 16)
> +			*val = get_unaligned_be16(st->rx_buf);
> +		else
> +			*val = get_unaligned_be24(st->rx_buf);
> +
> +		*val >>= scan_type->shift;
> +	}
> +
> +	return 0;
> +}
> +
> +static int ad4134_reg_read(void *context, unsigned int reg, unsigned int *val)
> +{
> +	struct ad4134_state *st = context;
> +	struct spi_device *spi = to_spi_device(st->dev);
> +	struct spi_transfer xfer = {
> +		.tx_buf = st->tx_buf,
> +		.rx_buf = st->rx_buf,
> +		.len = AD4134_SPI_MAX_XFER_LEN,
> +	};
> +	unsigned int inst;
> +	int ret;
> +
> +	if (reg >= AD4134_CH_VREG(0))
> +		return ad4134_data_read(st, reg, val);

If you are going down this path the xfer isn't used.  To avoid that being
a little confusing I'd factor out the rest of this function into a helper

> +
> +	inst = AD4134_REG_READ_MASK | reg;
> +	ad4134_prepare_spi_tx_buf(inst, 0, st->tx_buf);
> +
> +	ret = spi_sync_transfer(spi, &xfer, 1);
> +	if (ret)
> +		return ret;
> +
> +	*val = st->rx_buf[1];
> +
> +	/* Check CRC */
> +	if (st->rx_buf[2] != st->tx_buf[2])
> +		dev_dbg(st->dev, "reg read CRC check failed\n");
> +
> +	return 0;
> +}


> +
> +static const struct ad4134_bus_info ad4134_min_io_bus_info = {

given it's a mix of bus specific and other stuff, I'm not sure 
that calling this bus_info makes sense.  Maybe just ad4134_info?

> +	.chip_info = &ad4134_chip_info,
> +	.bops = &ad4134_min_io_bops,
> +};

Re: [PATCH v1 2/3] iio: adc: Initial support for AD4134

[kernel test robot]

Hi Marcelo,

kernel test robot noticed the following build errors:

[auto build test ERROR on c5411c8b9ed1caf53604bb1a5be3f487988efc98]

url:    https://github.com/intel-lab-lkp/linux/commits/Marcelo-Schmitt/dt-bindings-iio-adc-Add-AD4134/20251110-204756
base:   c5411c8b9ed1caf53604bb1a5be3f487988efc98
patch link:    https://lore.kernel.org/r/86f532ae3a9b3f122b9d5dbada9c131a0c048ca7.1762777931.git.marcelo.schmitt%40analog.com
patch subject: [PATCH v1 2/3] iio: adc: Initial support for AD4134
config: hexagon-allmodconfig (https://download.01.org/0day-ci/archive/20251114/202511141221.nUo0NmMn-lkp@intel.com/config)
compiler: clang version 17.0.6 (https://github.com/llvm/llvm-project 6009708b4367171ccdbf4b5905cb6a803753fe18)
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251114/202511141221.nUo0NmMn-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202511141221.nUo0NmMn-lkp@intel.com/

All errors (new ones prefixed by >>):

>> drivers/iio/adc/ad4134-common.c:178:6: error: call to undeclared function 'FIELD_PREP'; ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]
     178 |                                  FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
         |                                  ^
   1 error generated.


vim +/FIELD_PREP +178 drivers/iio/adc/ad4134-common.c

    87	
    88	int ad4134_probe(struct device *dev, const struct ad4134_bus_info *bus_info)
    89	{
    90		bool use_internal_ldo_retulator;
    91		struct gpio_desc *reset_gpio;
    92		struct iio_dev *indio_dev;
    93		struct ad4134_state *st;
    94		int ret;
    95	
    96		indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
    97		if (!indio_dev)
    98			return -ENOMEM;
    99	
   100		st = iio_priv(indio_dev);
   101		st->dev = dev;
   102	
   103		indio_dev->name = bus_info->chip_info->name;
   104	
   105		/* Required regulators */
   106		ret = devm_regulator_bulk_get_enable(dev, 3, ad4143_regulator_names);
   107		if (ret)
   108			return dev_err_probe(dev, ret, "failed to enable power supplies\n");
   109	
   110		/* Required regulator that we need to read the voltage */
   111		ret = devm_regulator_get_enable_read_voltage(dev, "refin");
   112		if (ret < 0)
   113			return dev_err_probe(dev, ret, "failed to get REFIN voltage.\n");
   114	
   115		st->refin_mv = ret / MILLI;
   116	
   117		/*
   118		 * If ldoin is not provided, then avdd1v8, dvdd1v8, and clkvdd are
   119		 * required.
   120		 */
   121		ret = devm_regulator_get_enable_optional(dev, "ldoin");
   122		if (ret < 0 && ret != -ENODEV)
   123			return dev_err_probe(dev, ret, "failed to enable ldoin supply\n");
   124	
   125		use_internal_ldo_retulator = ret == 0;
   126	
   127		if (!use_internal_ldo_retulator) {
   128			ret = devm_regulator_get_enable(dev, "avdd1v8");
   129			if (ret < 0)
   130				return dev_err_probe(dev, ret,
   131						     "failed to enable avdd1v8 supply\n");
   132	
   133			ret = devm_regulator_get_enable(dev, "dvdd1v8");
   134			if (ret < 0)
   135				return dev_err_probe(dev, ret,
   136						     "failed to enable dvdd1v8 supply\n");
   137	
   138			ret = devm_regulator_get_enable(dev, "clkvdd");
   139			if (ret < 0)
   140				return dev_err_probe(dev, ret,
   141						     "failed to enable clkvdd supply\n");
   142		}
   143	
   144		ret = ad4134_clock_select(st);
   145		if (ret)
   146			return ret;
   147	
   148		crc8_populate_msb(ad4134_spi_crc_table, AD4134_SPI_CRC_POLYNOM);
   149	
   150		reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
   151		if (IS_ERR(reset_gpio))
   152			return dev_err_probe(dev, PTR_ERR(reset_gpio),
   153					     "failed to find reset GPIO\n");
   154	
   155		if (reset_gpio) {
   156			fsleep(AD4134_RESET_TIME_US);
   157			gpiod_set_value_cansleep(reset_gpio, 0);
   158		}
   159	
   160		ret = bus_info->bops->config_iio_dev(indio_dev);
   161		if (ret)
   162			return dev_err_probe(dev, ret, "failed to config IIO device\n");
   163	
   164		st->regmap = bus_info->bops->init_regmap(st);
   165		if (IS_ERR(st->regmap))
   166			return dev_err_probe(st->dev, PTR_ERR(st->regmap),
   167					     "failed to initialize regmap");
   168	
   169		/* wiring/configuration specific setup */
   170		ret = bus_info->bops->setup(st);
   171		if (ret)
   172			return dev_err_probe(dev, ret, "failed to setup bus\n");
   173	
   174		/* Bump precision to 24-bit */
   175		st->current_scan_type = AD4134_DATA_PACKET_24BIT_FRAME;
   176		ret = regmap_update_bits(st->regmap, AD4134_DATA_PACKET_CONFIG_REG,
   177					 AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
 > 178					 FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
   179						    st->current_scan_type));
   180		if (ret)
   181			return ret;
   182	
   183		/* Set high performance power mode */
   184		ret = regmap_update_bits(st->regmap, AD4134_DEVICE_CONFIG_REG,
   185					 AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
   186					 FIELD_PREP(AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
   187						    AD4134_POWER_MODE_HIGH_PERF));
   188		if (ret)
   189			return ret;
   190	
   191		return devm_iio_device_register(dev, indio_dev);
   192	}
   193	EXPORT_SYMBOL_NS_GPL(ad4134_probe, "IIO_AD4134");
   194	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH v1 2/3] iio: adc: Initial support for AD4134

[kernel test robot]

Hi Marcelo,

kernel test robot noticed the following build errors:

[auto build test ERROR on c5411c8b9ed1caf53604bb1a5be3f487988efc98]

url:    https://github.com/intel-lab-lkp/linux/commits/Marcelo-Schmitt/dt-bindings-iio-adc-Add-AD4134/20251110-204756
base:   c5411c8b9ed1caf53604bb1a5be3f487988efc98
patch link:    https://lore.kernel.org/r/86f532ae3a9b3f122b9d5dbada9c131a0c048ca7.1762777931.git.marcelo.schmitt%40analog.com
patch subject: [PATCH v1 2/3] iio: adc: Initial support for AD4134
config: nios2-allyesconfig (https://download.01.org/0day-ci/archive/20251114/202511141657.LqnXWUQm-lkp@intel.com/config)
compiler: nios2-linux-gcc (GCC) 11.5.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20251114/202511141657.LqnXWUQm-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202511141657.LqnXWUQm-lkp@intel.com/

All errors (new ones prefixed by >>):

   drivers/iio/adc/ad4134-common.c: In function 'ad4134_probe':
>> drivers/iio/adc/ad4134-common.c:178:34: error: implicit declaration of function 'FIELD_PREP' [-Werror=implicit-function-declaration]
     178 |                                  FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
         |                                  ^~~~~~~~~~
   cc1: some warnings being treated as errors


vim +/FIELD_PREP +178 drivers/iio/adc/ad4134-common.c

    87	
    88	int ad4134_probe(struct device *dev, const struct ad4134_bus_info *bus_info)
    89	{
    90		bool use_internal_ldo_retulator;
    91		struct gpio_desc *reset_gpio;
    92		struct iio_dev *indio_dev;
    93		struct ad4134_state *st;
    94		int ret;
    95	
    96		indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
    97		if (!indio_dev)
    98			return -ENOMEM;
    99	
   100		st = iio_priv(indio_dev);
   101		st->dev = dev;
   102	
   103		indio_dev->name = bus_info->chip_info->name;
   104	
   105		/* Required regulators */
   106		ret = devm_regulator_bulk_get_enable(dev, 3, ad4143_regulator_names);
   107		if (ret)
   108			return dev_err_probe(dev, ret, "failed to enable power supplies\n");
   109	
   110		/* Required regulator that we need to read the voltage */
   111		ret = devm_regulator_get_enable_read_voltage(dev, "refin");
   112		if (ret < 0)
   113			return dev_err_probe(dev, ret, "failed to get REFIN voltage.\n");
   114	
   115		st->refin_mv = ret / MILLI;
   116	
   117		/*
   118		 * If ldoin is not provided, then avdd1v8, dvdd1v8, and clkvdd are
   119		 * required.
   120		 */
   121		ret = devm_regulator_get_enable_optional(dev, "ldoin");
   122		if (ret < 0 && ret != -ENODEV)
   123			return dev_err_probe(dev, ret, "failed to enable ldoin supply\n");
   124	
   125		use_internal_ldo_retulator = ret == 0;
   126	
   127		if (!use_internal_ldo_retulator) {
   128			ret = devm_regulator_get_enable(dev, "avdd1v8");
   129			if (ret < 0)
   130				return dev_err_probe(dev, ret,
   131						     "failed to enable avdd1v8 supply\n");
   132	
   133			ret = devm_regulator_get_enable(dev, "dvdd1v8");
   134			if (ret < 0)
   135				return dev_err_probe(dev, ret,
   136						     "failed to enable dvdd1v8 supply\n");
   137	
   138			ret = devm_regulator_get_enable(dev, "clkvdd");
   139			if (ret < 0)
   140				return dev_err_probe(dev, ret,
   141						     "failed to enable clkvdd supply\n");
   142		}
   143	
   144		ret = ad4134_clock_select(st);
   145		if (ret)
   146			return ret;
   147	
   148		crc8_populate_msb(ad4134_spi_crc_table, AD4134_SPI_CRC_POLYNOM);
   149	
   150		reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
   151		if (IS_ERR(reset_gpio))
   152			return dev_err_probe(dev, PTR_ERR(reset_gpio),
   153					     "failed to find reset GPIO\n");
   154	
   155		if (reset_gpio) {
   156			fsleep(AD4134_RESET_TIME_US);
   157			gpiod_set_value_cansleep(reset_gpio, 0);
   158		}
   159	
   160		ret = bus_info->bops->config_iio_dev(indio_dev);
   161		if (ret)
   162			return dev_err_probe(dev, ret, "failed to config IIO device\n");
   163	
   164		st->regmap = bus_info->bops->init_regmap(st);
   165		if (IS_ERR(st->regmap))
   166			return dev_err_probe(st->dev, PTR_ERR(st->regmap),
   167					     "failed to initialize regmap");
   168	
   169		/* wiring/configuration specific setup */
   170		ret = bus_info->bops->setup(st);
   171		if (ret)
   172			return dev_err_probe(dev, ret, "failed to setup bus\n");
   173	
   174		/* Bump precision to 24-bit */
   175		st->current_scan_type = AD4134_DATA_PACKET_24BIT_FRAME;
   176		ret = regmap_update_bits(st->regmap, AD4134_DATA_PACKET_CONFIG_REG,
   177					 AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
 > 178					 FIELD_PREP(AD4134_DATA_PACKET_CONFIG_FRAME_MASK,
   179						    st->current_scan_type));
   180		if (ret)
   181			return ret;
   182	
   183		/* Set high performance power mode */
   184		ret = regmap_update_bits(st->regmap, AD4134_DEVICE_CONFIG_REG,
   185					 AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
   186					 FIELD_PREP(AD4134_DEVICE_CONFIG_POWER_MODE_MASK,
   187						    AD4134_POWER_MODE_HIGH_PERF));
   188		if (ret)
   189			return ret;
   190	
   191		return devm_iio_device_register(dev, indio_dev);
   192	}
   193	EXPORT_SYMBOL_NS_GPL(ad4134_probe, "IIO_AD4134");
   194	

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

[PATCH v1 3/3] Docs: iio: Add AD4134

[Marcelo Schmitt]

Add initial documentation for the ad4134 IIO driver.

Signed-off-by: Marcelo Schmitt <marcelo.schmitt@analog.com>
---
 Documentation/iio/ad4134.rst | 58 ++++++++++++++++++++++++++++++++++++
 Documentation/iio/index.rst  |  1 +
 MAINTAINERS                  |  1 +
 3 files changed, 60 insertions(+)
 create mode 100644 Documentation/iio/ad4134.rst

diff --git a/Documentation/iio/ad4134.rst b/Documentation/iio/ad4134.rst
new file mode 100644
index 000000000000..fe20ec6f2132
--- /dev/null
+++ b/Documentation/iio/ad4134.rst
@@ -0,0 +1,58 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+=============
+AD4134 driver
+=============
+
+Device driver for Analog Devices Inc. AD4134 and similar ADCs.
+
+Supported devices
+=================
+
+* `AD4134 <https://www.analog.com/AD4134>`_
+* `AD7134 <https://www.analog.com/AD7134>`_
+
+Wiring connections
+------------------
+
+AD4134 and similar ADCs can operate in a few different wiring configurations.
+
+Minimum I/O mode (SPI control mode)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The minimum I/O mode wiring allows AD4134 register and data access with the
+conventional set of SPI bus lines. The hardware configuration settings for using
+AD4134 in minimum I/O mode are:
+
++----------------------------+----------------------+--------------------+
+| Pin Function               |         Level        | Description        |
++============================+======================+====================+
+| PIN/SPI                    |         High         | SPI control mode   |
++----------------------------+----------------------+--------------------+
+| MODE                       |         Low          | ASRC slave mode    |
++----------------------------+----------------------+--------------------+
+| DCLKIO                     |         Low          | DCLK input         |
++----------------------------+----------------------+--------------------+
+| DCLKMODE                   |         Low          | Gated DCLK         |
++----------------------------+----------------------+--------------------+
+
+A possible connection schema that sets AD4134 digital interface for minimum I/O
+mode is:
+
+::
+
+                                 IOVDD
+      +------------------------+   |
+      |                PIN/SPI |<--+     +-------------+
+      |                        |         |     HOST    |
+      |                   DCLK |<--+     |             |
+      |           FORMAT1/SCLK |<--+---- | SCLK        |
+      |   AD4134      DEC2/SDI |<--------| SDO         |
+      |               DEC3/SDO |-------->| SDI         |
+      |                    ODR |<--------| GPIO        |
+      |             FORMAT0/CS |<--+     |             |
+      |                   MODE |<--+     +-------------+
+      |            DEC0/DCLKIO |<--+
+      |          DEC1/DCLKMODE |<--+
+      +------------------------+   |
+                                  GND
diff --git a/Documentation/iio/index.rst b/Documentation/iio/index.rst
index 315ae37d6fd4..d4ed782c93a6 100644
--- a/Documentation/iio/index.rst
+++ b/Documentation/iio/index.rst
@@ -22,6 +22,7 @@ Industrial I/O Kernel Drivers
    ad3552r
    ad4000
    ad4030
+   ad4134
    ad4695
    ad7191
    ad7380
diff --git a/MAINTAINERS b/MAINTAINERS
index e709ec1d6717..80ae2fd4735c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1443,6 +1443,7 @@ L:	linux-iio@vger.kernel.org
 S:	Supported
 W:	https://ez.analog.com/linux-software-drivers
 F:	Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
+F:	Documentation/iio/ad4134.rst
 F:	drivers/iio/adc/ad4134*
 
 ANALOG DEVICES INC AD4170-4 DRIVER
-- 
2.51.0

Re: [PATCH v1 3/3] Docs: iio: Add AD4134

[Randy Dunlap]

On 11/10/25 4:45 AM, Marcelo Schmitt wrote:
> diff --git a/Documentation/iio/ad4134.rst b/Documentation/iio/ad4134.rst
> new file mode 100644
> index 000000000000..fe20ec6f2132
> --- /dev/null
> +++ b/Documentation/iio/ad4134.rst
> @@ -0,0 +1,58 @@
> +.. SPDX-License-Identifier: GPL-2.0-only
> +
> +=============
> +AD4134 driver
> +=============
> +
> +Device driver for Analog Devices Inc. AD4134 and similar ADCs.
> +
> +Supported devices
> +=================
> +
> +* `AD4134 <https://www.analog.com/AD4134>`_
> +* `AD7134 <https://www.analog.com/AD7134>`_
> +
> +Wiring connections
> +------------------
> +
> +AD4134 and similar ADCs can operate in a few different wiring configurations.
> +
> +Minimum I/O mode (SPI control mode)
> +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^

Fourth level "underlines" should be "~~~~~~~~~~~~~~~~~~~~~~"
according to Documentation/doc-guide/sphinx.rst.

> +
> +The minimum I/O mode wiring allows AD4134 register and data access with the
> +conventional set of SPI bus lines. The hardware configuration settings for using
> +AD4134 in minimum I/O mode are:

-- 
~Randy

Re: [PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[Andy Shevchenko]

On Mon, Nov 10, 2025 at 09:44:56AM -0300, Marcelo Schmitt wrote:
> This patch series adds basic support for ad4134. AD4134 is a very flexible
> device that can be configured in many different ways. This series aims to
> support the simplest way of interfacing with AD4134 which is called minimum I/O
> mode in data sheet. This is essentially usual SPI with the addition of an ODR
> (Output Data Rate) GPIO which functions as conversion start signal in minimum
> I/O mode. The CS pin may be connected to a host controller CS pin or grounded.
> 
> This set provides just one feature:
> - Single-shot ADC sample read.
> 
> [PATCH 1] Device tree documentation for AD4134.
> [PATCH 2] IIO Linux driver for AD4134.
> [PATCH 3] Initial IIO documentation.
> 
> There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
> configurations suited for high speed data transfers. Even though the minimum I/O
> support was initialy based on that high speed transfer driver, the result ended
> up becoming entirely different. Also, because the different wiring
> configurations are likely going to use different resources and software
> interfaces, the code for AD4134 support was split into ad4134-spi.c,
> ad4134-common.h, and ad4134-common.c.

The cover letter misses the answer to: "Why do we need a brand new driver?
Don't we have anything similar already in IIO that can be expanded to cover
this one?"

-- 
With Best Regards,
Andy Shevchenko

Re: [PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[Marcelo Schmitt]

Hi Andy,

On 11/10, Andy Shevchenko wrote:
> On Mon, Nov 10, 2025 at 09:44:56AM -0300, Marcelo Schmitt wrote:
> > This patch series adds basic support for ad4134. AD4134 is a very flexible
> > device that can be configured in many different ways. This series aims to
> > support the simplest way of interfacing with AD4134 which is called minimum I/O
> > mode in data sheet. This is essentially usual SPI with the addition of an ODR
> > (Output Data Rate) GPIO which functions as conversion start signal in minimum
> > I/O mode. The CS pin may be connected to a host controller CS pin or grounded.
> > 
> > This set provides just one feature:
> > - Single-shot ADC sample read.
> > 
> > [PATCH 1] Device tree documentation for AD4134.
> > [PATCH 2] IIO Linux driver for AD4134.
> > [PATCH 3] Initial IIO documentation.
> > 
> > There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
> > configurations suited for high speed data transfers. Even though the minimum I/O
> > support was initialy based on that high speed transfer driver, the result ended
> > up becoming entirely different. Also, because the different wiring
> > configurations are likely going to use different resources and software
> > interfaces, the code for AD4134 support was split into ad4134-spi.c,
> > ad4134-common.h, and ad4134-common.c.
> 
> The cover letter misses the answer to: "Why do we need a brand new driver?
> Don't we have anything similar already in IIO that can be expanded to cover
> this one?"

Ah sorry about that, let me provide more context.

ADI has a design called AD4134 which people would like to use with Linux.
This is another fast sample rate ADC that would need SPI offload support to
reach maximum sample rate. The driver I mentioned above provides support for the
SPI offload use case but, it has not been reviewed nor merged to mainline Linux
(at least as far as I'm aware of). I also searched the lore and found no
previous matches for ad4134. So, we currently have no driver supporting AD4134
on mainline Linux.

Why not just upstreaming the SPI offload support driver for AD4134? To achieve
the highest sample rates, the AD4134 provides a dedicated set of lines (DOUT0 to
DOUT3) to output ADC sample data. We would need to describe and manage an
additional bus this part (an SPI bus for configuration, and a data bus to read
ADC conversions). In ADI tree + HDL, the data bus is read through SPI-Engine
as usual SPI data and a second SPI controller interface is used for normal SPI
commands. The setup actually uses two AD4134 devices and is more or less like
the diagram below.

::

                                                              +-------------+
  +----------------------+                                    |  DATA HOST  |
  |       AD4134         |                                    | (SPI-ENGINE)|
  |                      |                                    |             |
  |Data interface  DOUT0 |----------------------------------->| GPI0        |
  |for ADC data    DOUT1 |----------------------------------->| GPI1        |
  |read back       DOUT2 |----------------------------------->| GPI2        |
  |                DOUT3 |----------------------------------->| GPI3        |
  |                DCLK  |<--------------+        +---------->| GPI4        |
  |                ODR   |<------------+ |        | +-------->| GPI5        |
  |                      |             | |        | | +------>| GPI6        |
  |                      |             | |        | | | +---->| GPI7        |
  | SPI interface   CS   |<-------+    | +--------|-|-|-|-+---| DCLK        |
  | for register    SCLK |<-----+ |    |          | | | | |   |             |
  | access          SDI  |<---+ | |    |          | | | | |   | TRIGGER     |
  |                 SDO  |--+ | | |    |          | | | | |   +-------------+
  +----------------------+  | | | |    +----------|-|-|-|-|-+     ^
                            | | | |               | | | | | |     |
  +----------------------+  | | | | +-----------+ | | | | | | +---+
  |       AD4134         |  | | | | |   HOST    | | | | | | | |
  |                      |  | | | | |(ZED PS SPI) | | | | | | |  +------------+
  | SPI interface   CS   |<-|-|-|-+-| CS        | | | | | | | |  | PULSE      |
  | for register    SCLK |<-|-|-+---| SCLK      | | | | | | | |  | GENERATOR  |
  | access          SDI  |<-|-+-----| MOSI      | | | | | | | |  |(AXI PWM GEN)
  |                 SDO  |--+------>| MISO      | | | | | | | |  |            |
  |                      |          +-----------+ | | | | | | +--| OUT0       |
  |                      |                        | | | | | +----| OUT1       |
  |Data interface  DOUT0 |------------------------+ | | | | |    +------------+
  |for ADC data    DOUT1 |--------------------------+ | | | |
  |read back       DOUT2 |----------------------------+ | | |
  |                DOUT3 |------------------------------+ | |
  |                DCLK  |<-------------------------------+ |
  |                ODR   |<---------------------------------+
  +----------------------+


Luckily, for handling the dedicated data bus, we might benefit from the multi-bus
support [1] in the future. Though, the high speed setup has other implied
intricacies such as an additional periodic signal (ODR) being required to sample
data in addition to DCLK.

[1]: https://lore.kernel.org/linux-iio/20251107-spi-add-multi-bus-support-v2-0-8a92693314d9@baylibre.com/

Although we got that working on ADI tree, there are some aspects of the high
speed driver that could be improved before upstreaming, IMHO.
So, to start with something less overwhelming, I thought of trying the minimum
I/O mode first (a.k.a. usual SPI interface). Note that the -common parts of the
driver are intended to be reusable by the high speed driver when we get to
upstreaming that. Also, by the way, that high speed driver doesn't support
minimum I/O mode and the intent is that the drivers will provide complementary
ways of interfacing with AD4134.

With best regards,
Marcelo

Re: [PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[Nuno Sá]

On Mon, 2025-11-10 at 09:44 -0300, Marcelo Schmitt wrote:
> This patch series adds basic support for ad4134. AD4134 is a very flexible
> device that can be configured in many different ways. This series aims to
> support the simplest way of interfacing with AD4134 which is called minimum I/O
> mode in data sheet. This is essentially usual SPI with the addition of an ODR
> (Output Data Rate) GPIO which functions as conversion start signal in minimum
> I/O mode. The CS pin may be connected to a host controller CS pin or grounded.
> 
> This set provides just one feature:
> - Single-shot ADC sample read.
> 
> [PATCH 1] Device tree documentation for AD4134.
> [PATCH 2] IIO Linux driver for AD4134.
> [PATCH 3] Initial IIO documentation.
> 
> There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
> configurations suited for high speed data transfers. Even though the minimum I/O
> support was initialy based on that high speed transfer driver, the result ended
> up becoming entirely different. Also, because the different wiring
> configurations are likely going to use different resources and software
> interfaces, the code for AD4134 support was split into ad4134-spi.c,
> ad4134-common.h, and ad4134-common.c.

I'm familiar with the odd way this part is implemented in ADI tree :). Question is, are
you intending to support the high speed bits? I guess so, otherwise having the above split
would not make much sense.

- Nuno Sá

> 
> With best regards,
> Marcelo
> 
> Marcelo Schmitt (3):
>   dt-bindings: iio: adc: Add AD4134
>   iio: adc: Initial support for AD4134
>   Docs: iio: Add AD4134
> 
>  .../bindings/iio/adc/adi,ad4134.yaml          | 209 +++++++++++++
>  Documentation/iio/ad4134.rst                  |  58 ++++
>  Documentation/iio/index.rst                   |   1 +
>  MAINTAINERS                                   |   9 +
>  drivers/iio/adc/Kconfig                       |  15 +
>  drivers/iio/adc/Makefile                      |   2 +
>  drivers/iio/adc/ad4134-common.c               | 200 ++++++++++++
>  drivers/iio/adc/ad4134-common.h               | 132 ++++++++
>  drivers/iio/adc/ad4134-spi.c                  | 287 ++++++++++++++++++
>  9 files changed, 913 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/iio/adc/adi,ad4134.yaml
>  create mode 100644 Documentation/iio/ad4134.rst
>  create mode 100644 drivers/iio/adc/ad4134-common.c
>  create mode 100644 drivers/iio/adc/ad4134-common.h
>  create mode 100644 drivers/iio/adc/ad4134-spi.c
> 
> 
> base-commit: c5411c8b9ed1caf53604bb1a5be3f487988efc98

Re: [PATCH v1 0/3] iio: adc: Add AD4134 minimum I/O support

[Marcelo Schmitt]

Hi Nuno,

On 11/10, Nuno Sá wrote:
> On Mon, 2025-11-10 at 09:44 -0300, Marcelo Schmitt wrote:
> > This patch series adds basic support for ad4134. AD4134 is a very flexible
> > device that can be configured in many different ways. This series aims to
> > support the simplest way of interfacing with AD4134 which is called minimum I/O
> > mode in data sheet. This is essentially usual SPI with the addition of an ODR
> > (Output Data Rate) GPIO which functions as conversion start signal in minimum
> > I/O mode. The CS pin may be connected to a host controller CS pin or grounded.
> > 
> > This set provides just one feature:
> > - Single-shot ADC sample read.
> > 
> > [PATCH 1] Device tree documentation for AD4134.
> > [PATCH 2] IIO Linux driver for AD4134.
> > [PATCH 3] Initial IIO documentation.
> > 
> > There is a driver by Cosmin on ADI Linux tree that supports AD4134 in wiring
> > configurations suited for high speed data transfers. Even though the minimum I/O
> > support was initialy based on that high speed transfer driver, the result ended
> > up becoming entirely different. Also, because the different wiring
> > configurations are likely going to use different resources and software
> > interfaces, the code for AD4134 support was split into ad4134-spi.c,
> > ad4134-common.h, and ad4134-common.c.
> 
> I'm familiar with the odd way this part is implemented in ADI tree :). Question is, are
> you intending to support the high speed bits? I guess so, otherwise having the above split
> would not make much sense.
> 
Yes, the intent is that the common parts may be reusable by the high speed
driver when we get to upstream that. For now, this only supports conventional SPI.
We may, at least, get some support for AD4134, though.