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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?WkOGWx84a/qqHKN1ULZ8W0X4/50mhn/xa2BS5Hv+mRrFt6bLow/a5AFyLfJt?= =?us-ascii?Q?q6ygPahd4C+THtotm2dZOUXkMEqJ8sj990aAcTq7nsyiNL64JEPsYlfyuFy6?= =?us-ascii?Q?KuZl7ROdTrkIOU3i0L2X9OA1zdUwBW8ms5wbdEg4BHaZXdicNPc+vZR0/pVp?= =?us-ascii?Q?1p8C5mDTAa+QBUUOOUXT88X4q2IJAvBrb4UFJQXSjhp96St9gP06NyWVsPC1?= =?us-ascii?Q?2grCiQnrso4T7bBfqSHEiAcGJMTv4OrQfpBv0tNORN6u4mDSj70So+UafvPT?= =?us-ascii?Q?Zv3qxkTqrqgRhdyfDDJ9bozWF2qi4xssSMrkCe+LqSGumfBnJY9JZOpVdGue?= =?us-ascii?Q?XA7oiBxndodiTNSptyNUeBt81LmPxRC3FkLiSVr7z3V8c2RV1djgbSUK377Z?= =?us-ascii?Q?mokzQFqUTjgaN4/iaSF+G0HOgDVhPERqgHPLtkY1syTT+6tq7zPQtZGSkwbt?= =?us-ascii?Q?atjeocEuEauU+xLmcqWtkmcl8ssWy3SGhjWyE99mBC6KOuFNqDXGsP/moBjn?= =?us-ascii?Q?mqrPlrIn+9pSE1FfdEguW5WBWNAy//B4KmhVpsBK7tFs2k1brpICfS8xU3n1?= =?us-ascii?Q?Tk4q+/yaxdDCVJHnxApu6upWtVTdYENETsARoLmgH6oTPvPPEKD4I/9Sf0Cf?= =?us-ascii?Q?0leNIOpEdbK0f6zN7NuzSHgt3Q44B6MD/o4upkeXlvOBqjDfiW/cyBtG/G2t?= =?us-ascii?Q?WATG7/c40QaXNhPyzyXLafHVsqGZXkB1PB05zH09/XL6tPQu1ST416i1Pdbx?= =?us-ascii?Q?bkNDmLNna1+EX9hQHs/5uwHSECu7ZuiHHhCHEKS0nPqexTcoC1Wllauovd2C?= =?us-ascii?Q?lLq7HzvW4MgvET1kF6t0Ism9xfJy6RqL+8qWZXP+YwQm92AjptAwM6Xj1ETi?= =?us-ascii?Q?WT3kjHiLo8k96f12Jl6rJkk5MKpyZPwN5vmTmemvoBIBp9O464WGvOMhL+Cf?= =?us-ascii?Q?yfxf0wS+lz9Qi0JEbXjtR2RuMTo736WMsHUYSHWUGv8L6TYZXzjr7/NQ3j1o?= =?us-ascii?Q?I5znWK5ueMgFj2VRTF3pvslGpepR/oxCepRF5wj/PhMo2mWkGwwIKZ9rdQaZ?= =?us-ascii?Q?KUcYWyViSyAgmY0MONLrmVGwpcpLb4omy4N4fPo+FoDvvUCNbpxUbQT0O97k?= =?us-ascii?Q?/x/5xPVqvgesAhrnqCfeS8XN/TsWOsqb/sZ0Dx25DsYT15ob5o1EJgqPLQ3v?= =?us-ascii?Q?qeb1GcBMSwnE8zifDh5+b8WZx3P5rUnV374D+ibmpBA2Vf3SmbYJ6/LTU+kd?= =?us-ascii?Q?JyaG/WCZW3Cvswn9JtAQ2QN9g71wtN7mXWSFYzqm0tbJa5EKoC10L2p6/8gT?= =?us-ascii?Q?VEn7z7wI0YPuGg+8Ienx4GT1b6LrVtZnvUxOFRlFdj2Ezt6fV1A4Z8uG5xt8?= =?us-ascii?Q?TmlcYklad0N7/RqGKHXhxCBcjxmp8A2VIZKNbppMmnct31HPLQ1L7En23XnP?= =?us-ascii?Q?jOtXkrjsbUAC0tM35iHGrKD0A0RP2CSNdYJiuY2yTrq9fRKqiVqnaRZsZj6l?= =?us-ascii?Q?DT6D/kVCHGrGsC4N2rF5wVnVNiatMFrITJ+y/6dL14QPPMrHro9UrSvFZ+cB?= =?us-ascii?Q?6lTY6PCW7pLzlxexlCU=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a498f77b-236b-46ee-637f-08de220c2e57 X-MS-Exchange-CrossTenant-AuthSource: PAXSPRMB0053.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Nov 2025 16:54:45.0671 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8Tms73zmctYz4hGETqT1okFvvMuZxe+1ydGdJ5I+pMSQnV0OM4Uefcmzw5Az4tgLBAAiVawRsrMk6H2Hx/bw4Q== X-MS-Exchange-Transport-CrossTenantHeadersStamped: PR3PR04MB7369 On Sat, Nov 08, 2025 at 08:53:19AM +0530, Manivannan Sadhasivam wrote: > Add the devicetree binding for PCIe M.2 Mechanical Key M connector defined > in the PCI Express M.2 Specification, r4.0, sec 5.3. This connector > provides interfaces like PCIe and SATA to attach the Solid State Drives > (SSDs) to the host machine along with additional interfaces like USB, and > SMB for debugging and supplementary features. At any point of time, the > connector can only support either PCIe or SATA as the primary host > interface. > > The connector provides a primary power supply of 3.3v, along with an > optional 1.8v VIO supply for the Adapter I/O buffer circuitry operating at > 1.8v sideband signaling. > > The connector also supplies optional signals in the form of GPIOs for fine > grained power management. > > Signed-off-by: Manivannan Sadhasivam > --- Reviewed-by: Frank Li > .../bindings/connector/pcie-m2-m-connector.yaml | 122 +++++++++++++++++++++ > 1 file changed, 122 insertions(+) > > diff --git a/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..be0a3b43e8fd2a2a3b76cad4808ddde79dceaa21 > --- /dev/null > +++ b/Documentation/devicetree/bindings/connector/pcie-m2-m-connector.yaml > @@ -0,0 +1,122 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/connector/pcie-m2-m-connector.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: PCIe M.2 Mechanical Key M Connector > + > +maintainers: > + - Manivannan Sadhasivam > + > +description: > + A PCIe M.2 M connector node represents a physical PCIe M.2 Mechanical Key M > + connector. The Mechanical Key M connectors are used to connect SSDs to the > + host system over PCIe/SATA interfaces. These connectors also offer optional > + interfaces like USB, SMB. > + > +properties: > + compatible: > + const: pcie-m2-m-connector > + > + vpcie3v3-supply: > + description: A phandle to the regulator for 3.3v supply. > + > + vio1v8-supply: > + description: A phandle to the regulator for VIO 1.8v supply. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + description: OF graph bindings modeling the interfaces exposed on the > + connector. Since a single connector can have multiple interfaces, every > + interface has an assigned OF graph port number as described below. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: PCIe/SATA interface > + > + port@1: > + $ref: /schemas/graph.yaml#/properties/port > + description: USB interface > + > + port@2: > + $ref: /schemas/graph.yaml#/properties/port > + description: SMB interface > + > + required: > + - port@0 > + > + clocks: > + description: 32.768 KHz Suspend Clock (SUSCLK) input from the host system to > + the M.2 card. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.1 for > + more details. > + maxItems: 1 > + > + pedet-gpios: > + description: GPIO controlled connection to PEDET signal. This signal is used > + by the host systems to determine the communication protocol that the M.2 > + card uses; SATA signaling (low) or PCIe signaling (high). Refer, PCI > + Express M.2 Specification r4.0, sec 3.3.4.2 for more details. > + maxItems: 1 > + > + led1-gpios: > + description: GPIO controlled connection to LED_1# signal. This signal is > + used by the M.2 card to indicate the card status via the system mounted > + LED. Refer, PCI Express M.2 Specification r4.0, sec 3.1.12.2 for more > + details. > + maxItems: 1 > + > + viocfg-gpios: > + description: GPIO controlled connection to IO voltage configuration > + (VIO_CFG) signal. This signal is used by the M.2 card to indicate to the > + host system that the card supports an independent IO voltage domain for > + the sideband signals. Refer, PCI Express M.2 Specification r4.0, sec > + 3.1.15.1 for more details. > + maxItems: 1 > + > + pwrdis-gpios: > + description: GPIO controlled connection to Power Disable (PWRDIS) signal. > + This signal is used by the host system to disable power on the M.2 card. > + Refer, PCI Express M.2 Specification r4.0, sec 3.3.5.2 for more details. > + maxItems: 1 > + > + pln-gpios: > + description: GPIO controlled connection to Power Loss Notification (PLN#) > + signal. This signal is use to notify the M.2 card by the host system that > + the power loss event is expected to occur. Refer, PCI Express M.2 > + Specification r4.0, sec 3.2.17.1 for more details. > + maxItems: 1 > + > + plas3-gpios: > + description: GPIO controlled connection to Power Loss Acknowledge (PLA_S3#) > + signal. This signal is used by the M.2 card to notify the host system, the > + status of the M.2 card's preparation for power loss. > + maxItems: 1 > + > +required: > + - compatible > + - vpcie3v3-supply > + > +additionalProperties: false > + > +examples: > + # PCI M.2 Key M connector for SSDs with PCIe interface > + - | > + connector { > + compatible = "pcie-m2-m-connector"; > + vpcie3v3-supply = <&vreg_nvme>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + > + endpoint { > + remote-endpoint = <&pcie6_port0_ep>; > + }; > + }; > + }; > + }; > > -- > 2.48.1 >