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[129.46.96.20]) by smtp.gmail.com with ESMTPSA id 5614622812f47-450ffe2d425sm1473631b6e.4.2025.11.21.01.11.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Nov 2025 01:11:27 -0800 (PST) Date: Fri, 21 Nov 2025 01:11:25 -0800 From: Qiang Yu To: Manivannan Sadhasivam Cc: Vinod Koul , Kishon Vijay Abraham I , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Prudhvi Yarlagadda , Wenbin Yao , Dmitry Baryshkov Subject: Re: [PATCH v6 0/3] Add support for Glymur PCIe Gen5 x4 Message-ID: References: <20251103-glymur-pcie-upstream-v6-0-18a5e0a538dc@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-Authority-Analysis: v=2.4 cv=WeUBqkhX c=1 sm=1 tr=0 ts=69202cc1 cx=c_pps a=yymyAM/LQ7lj/HqAiIiKTw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17 a=kj9zAlcOel0A:10 a=6UeiqGixMTsA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=KKAkSRfTAAAA:8 a=DD3sGXivSqi05yfKeKUA:9 a=CjuIK1q_8ugA:10 a=efpaJB4zofY2dbm2aIRb:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-GUID: xgVl5NCtyCSzzzATQ56ogOtEzJ9wjkZ4 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMTIxMDA2OSBTYWx0ZWRfXweMLBhn/o6I1 zOls+5F2fzJZhhBqBK0weV6Lqs0LBJL36St56Z3JqLv+e46Dt9vCt0tK4xkFjfkWjlikknlmMsq W2lKde2YDTmQC6iX0/mtFNax56365s/wWakYaQOKeBnKKYyG08+AU5RBhC436HiV69yU1iaOe1m Rj5cJYXovYEp4mE+UoajuMt40RN7lmaEgdREVn826fL7tsFQri8MZozrvi9qnV3KvXedxyWUs/r QQRk6guxEvDW7LQekOgabEeWCJE0UbIGu53KLRCdGLF5WAUJA7UMlnewGJDVbKy3XXWO8QNt4Gk 0S1BNjXE+4Ht2kjmqhDBQL1WabIyw2zIsK7RbmdSysbYL37weByl9PulSONQToYq4xJvPhWypNG 12fX+NUa3qoqCLgEcijC6P9Rfp/Z3w== X-Proofpoint-ORIG-GUID: xgVl5NCtyCSzzzATQ56ogOtEzJ9wjkZ4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.100.49 definitions=2025-11-21_02,2025-11-20_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 bulkscore=0 clxscore=1015 suspectscore=0 spamscore=0 lowpriorityscore=0 adultscore=0 malwarescore=0 phishscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2510240001 definitions=main-2511210069 On Thu, Nov 20, 2025 at 04:50:12PM +0530, Manivannan Sadhasivam wrote: > On Thu, Nov 20, 2025 at 02:46:41AM -0800, Qiang Yu wrote: > > On Tue, Nov 18, 2025 at 10:40:59PM +0530, Vinod Koul wrote: > > > On 03-11-25, 23:56, Qiang Yu wrote: > > > > Glymur is the next generation compute SoC of Qualcomm. This patch series > > > > aims to add support for the fourth, fifth and sixth PCIe instance on it. > > > > The fifth PCIe instance on Glymur has a Gen5 4-lane PHY and fourth, fifth > > > > and sixth PCIe instance have a Gen5 2-lane PHY. > > > > > > > > The device tree changes and whatever driver patches that are not part of > > > > this patch series will be posted separately after official announcement of > > > > the SOC. > > > > > > Please rebase on phy/next, this does not apply for me > > > > Hi Vinod > > > > This patch serie depends on > > https://lore.kernel.org/all/20251017045919.34599-2-krzysztof.kozlowski@linaro.org/ > > > > Why was this dependency not mentioned in the cover letter? I mentioned it in the change history, but it was not very obvious. I will note this and explicitly mention dependencies in the cover letter body in other patches. - Qiang Yu