From: Jiayu Du <jiayu.riscv@isrc.iscas.ac.cn>
To: Xukai Wang <kingxukai@zohomail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Conor Dooley <conor@kernel.org>
Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org,
Samuel Holland <samuel.holland@sifive.com>,
Troy Mitchell <TroyMitchell988@gmail.com>
Subject: Re: [PATCH v10 2/3] clk: canaan: Add clock driver for Canaan K230
Date: Mon, 19 Jan 2026 16:18:59 +0800 [thread overview]
Message-ID: <aW3o8xVziqb9iRBN@duge-virtual-machine> (raw)
In-Reply-To: <20260116-b4-k230-clk-v10-2-de59033c5d30@zohomail.com>
> +
> +K230_CLK_GATE_FORMAT(hs_hclk_src_gate,
> + K230_HS_HCLK_SRC_GATE,
> + 0x18, 0, 0, 0,
> + &hs_hclk_high_src_rate.clk.hw);
Here, you replaced hs_hclk_high_gate(in v9) with hs_hclk_high_src_rate,
but after my board test, I find that when hs_hclk_high_gate is turned
off, the mmc/sd and other high-speed subsystems can not work. So maybe
you should not change the hs_hclk_high_gate to hs_hclk_high_src_rate.
When I used clk_ignore_unused, I saw the log as follows, while the enable
and prepare count of hs_hclk_high_gate is zero. Here is the log:
pll0_div4 5 5 0 400000000 0 0 50000 Y deviceless no_connection_id
hs_hclk_high_src_rate 1 1 0 400000000 0 0 50000 Y deviceless no_connection_id
hs_hclk_high_gate 0 0 0 400000000 0 0 50000 Y deviceless no_connection_id
hs_hclk_src_gate 1 1 0 400000000 0 0 50000 Y deviceless no_connection_id
hs_hclk_src_rate 4 4 0 200000000 0 0 50000 Y deviceless no_connection_id
hs_sd0_ahb_gate 1 1 0 200000000 0 0 50000 Y 91580000.mmc ahb
deviceless no_connection_id
hs_sd1_ahb_gate 1 1 0 200000000 0 0 50000 Y 91581000.mmc ahb
deviceless no_connection_id
hs_ssi1_ahb_gate 0 0 0 200000000 0 0 50000 Y deviceless no_connection_id
hs_ssi2_ahb_gate 0 0 0 200000000 0 0 50000 Y deviceless no_connection_id
hs_usb0_ahb_gate 1 1 0 200000000 0 0 50000 Y 91500000.usb otg
deviceless no_connection_id
hs_usb1_ahb_gate 1 1 0 200000000 0 0 50000 Y 91540000.usb otg
Regards,
Jiayu Du
> +
> +K230_CLK_RATE_FORMAT(hs_hclk_src_rate,
> + K230_HS_HCLK_SRC_RATE,
next prev parent reply other threads:[~2026-01-19 8:19 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-01-16 13:26 [PATCH v10 0/3] riscv: canaan: Add support for K230 clock Xukai Wang
2026-01-16 13:26 ` [PATCH v10 1/3] dt-bindings: clock: Add bindings for Canaan K230 clock controller Xukai Wang
2026-01-16 13:26 ` [PATCH v10 2/3] clk: canaan: Add clock driver for Canaan K230 Xukai Wang
2026-01-19 8:18 ` Jiayu Du [this message]
2026-01-22 11:40 ` Xukai Wang
2026-01-22 16:01 ` Jiayu Du
2026-01-27 11:03 ` Xukai Wang
2026-01-27 12:22 ` Jiayu Du
2026-01-27 13:21 ` Xukai Wang
2026-01-16 13:26 ` [PATCH v10 3/3] riscv: dts: canaan: Add clock definition for K230 Xukai Wang
2026-02-04 16:15 ` [PATCH v10 0/3] riscv: canaan: Add support for K230 clock Jiayu Du
2026-02-13 16:37 ` Xukai Wang
2026-02-14 6:33 ` Jiayu Du
2026-02-14 7:34 ` Xukai Wang
2026-02-14 8:15 ` Jiayu Du
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