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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?us-ascii?Q?dsBWrEBSnlCatr8ty5vbn8Vio7p6hxaDdEjisBACQM3qldvcLMOMBw9WlShe?= =?us-ascii?Q?Wa6WMMfcshF2nYGO6s1AvKrCbUhO8/jgMz4Nt/ZN0HQgfd/WB+om+25hvj4e?= =?us-ascii?Q?7uGow4NhC1Q4mdw/09SKPiIScqa+Vh4rUy/FPJ7yS0X5VYehT4w+KO95zNYV?= =?us-ascii?Q?G/whFg/tEbexMCDaK7D6kZZgEoQ0OBrTvpJwOJrtuaQOfcGZlbM1wpMPlukr?= =?us-ascii?Q?VHQfrL1L1L+NUzkRV7fBgKNzaHxYI+nkbUtlCQFRVvwfXKRMmQ58oCBzRrSm?= =?us-ascii?Q?jeojY2qUcz3YIUqDv+M/FYKNX1aDWS3Z9hpxpIxjLb9a+ePOb93NZShhQom7?= =?us-ascii?Q?Bj5ZyI5r7zLaIMWC0Xr1gp3fVPu2nmDbqiyB2FXxxahrD12ow2QP2bxF9BSe?= =?us-ascii?Q?686qLPiux8oRQL6Iw+CbW8z+VACiHoxBf+6q3z9xZF9aFyLzXN+Hip84ReKP?= =?us-ascii?Q?yKAZ/7yRMK2IB2A7BpaMoEzlfPpx1mz+AO8hWRlEJkovjqxiwdlpCt30tKUh?= =?us-ascii?Q?0W4GDDJxzkxmcl8fsp82GAHFZb4kQtB+YVVbKt1Gf4vAn1NStxbGBhPAoI6a?= =?us-ascii?Q?mJd1IOIbnGvLi02bsNVjkXiSvvcBnQDouOq+H6Sr4p64TDScMSrpTvEw3eZo?= =?us-ascii?Q?/TBqoLYf5n+vjr7eFyF9zbeWl6pD2EUGi/UGr+uwsEy6sJAV9pksejfbMU7Q?= =?us-ascii?Q?Ro+MVymKq//xtIuOSP7MoNGJOyL6+ETf471d8UWzGfswoz2rPXhi7UI7jZyK?= =?us-ascii?Q?yPWLmuxZBxXdCY2iBAzNv2K4RebD9ddLiapEOXXOYPm8yk/FnmSxPRLBHrrx?= =?us-ascii?Q?Cc0FBgOcG2wNF2q6G29qsvxXK3GFDTzsppeCPgKbBSdYBEaO64u5Y1TaMpHS?= =?us-ascii?Q?NyLeJvNB5tHfUO1PR2RFG09eppZxRVcf6xuGodkjBA1tnEHOCz4jdwNS5NLN?= =?us-ascii?Q?DqWELkz2LUjC50ge4nwhHI0aF8duTgizqL9wF5Z8TWl/Kq4vwjNQNiBA3NWo?= =?us-ascii?Q?e6mkawR9iiDh0mKRaEoGGGb91OtEZKrmcbxLIpfee8x9eAXIkFQ0S2tBce5h?= =?us-ascii?Q?YKsI1xx5AEni+arL8UWmKuh+joBVIXlv4mxKoYQQc4KgqFpBzUJM4hC9Fgom?= =?us-ascii?Q?5/7WXYRRK67bMQbudwfj9fRhZkX3few4vvTBtPZsHYkQxm3mUsFd05pyzoUJ?= =?us-ascii?Q?kclu6Gtp/a374QNJbVQq/QSlOKPr4s46rGUZmmw6VruGwq08NgYQujPVT/gh?= =?us-ascii?Q?dLpEL1bvG8hYgfEv7nItLkH0wPJcd9QKgLq8K+i1DRZOaIMxzBlVqW2t5y+M?= =?us-ascii?Q?+8sEuEWjwIhARovsmOJBGLERjHQiI81iaX87jx9EREhbljRIGAF/9V/43MdZ?= =?us-ascii?Q?xJzqu0Zw5uilhWGZm4IfhZWUYz8F8dznb+eMU05A3NwBq6al/4LWudBTL69v?= =?us-ascii?Q?9PAwLGPoc9AamcW67NNna6+wss0PS0xihS2EVtFB3jPcZaDXfKxkWc92maP7?= =?us-ascii?Q?eOhxvyk43pHnHZxqlkz87I/idc2R4E8lj2dS7gYlHVbYiM+UFak7fSYfSMqB?= =?us-ascii?Q?lNiajQkv+TQF1gg9iydNDTX3Es1kTgHea7JvlB7/OBH8TKRKPP4KfbfLZXHH?= =?us-ascii?Q?RtRuCZdGwSe3O6Qh8Q36vWBiFwWPRxbAMaK8pHPiWziHUKXDaopcocYqMfYd?= =?us-ascii?Q?jFqfcP7mNGwVYrweFNwbwuLXaWP7q82KLWHsltIiqNYa5vMc73EyiSqyURLP?= =?us-ascii?Q?ouCVxULIkA=3D=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 62bcf291-bfca-499c-d243-08de6b15207b X-MS-Exchange-CrossTenant-AuthSource: PA4PR04MB9366.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Feb 2026 15:32:41.8018 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: pI4JsNbXlI2ElCpm6hU8NR9BKwbK1zhkitwyyKbCq24bhEUCtPcTatWzxeb6ynGDG1/wIvs6A4Ru9RdJYO1Q/A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB9PR04MB8218 On Fri, Feb 13, 2026 at 12:08:44PM +0800, Sherry Sun wrote: > The current DT binding for pci-imx6 specifies the 'reset-gpios' property > in the host bridge node. However, the PERST# signal logically belongs to > individual Root Ports rather than the host bridge itself. This becomes > important when supporting PCIe KeyE connector and PCI power control > framework for pci-imx6 driver, which requires properties to be specified > in Root Port nodes. > > Add support for parsing 'reset-gpios' from Root Port child nodes using > the common helper pci_host_common_parse_ports(). The parsed reset GPIOs > are stored in the bridge's ports list and accessed during core reset > operations. Pre-allocate pci_host_bridge in imx_pcie_probe() for RC mode > to enable early Root Port parsing. > > To maintain DT backwards compatibility, fallback to the legacy method of > parsing the host bridge node if the reset property is not present in the > Root Port node. > > Signed-off-by: Sherry Sun > --- > drivers/pci/controller/dwc/pci-imx6.c | 81 ++++++++++++++++++++++----- > 1 file changed, 67 insertions(+), 14 deletions(-) > > diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c > index a5b8d0b71677..75afd56dad50 100644 > --- a/drivers/pci/controller/dwc/pci-imx6.c > +++ b/drivers/pci/controller/dwc/pci-imx6.c > @@ -34,6 +34,7 @@ > #include > > #include "../../pci.h" > +#include "../pci-host-common.h" > #include "pcie-designware.h" > > #define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9) > @@ -150,7 +151,6 @@ struct imx_lut_data { > > struct imx_pcie { > struct dw_pcie *pci; > - struct gpio_desc *reset_gpiod; > struct clk_bulk_data *clks; > int num_clks; > bool supports_clkreq; > @@ -897,29 +897,40 @@ static int imx95_pcie_core_reset(struct imx_pcie *imx_pcie, bool assert) > > static void imx_pcie_assert_core_reset(struct imx_pcie *imx_pcie) > { > + struct dw_pcie *pci = imx_pcie->pci; > + struct pci_host_bridge *bridge = pci->pp.bridge; > + struct pci_host_port *port; > + > reset_control_assert(imx_pcie->pciephy_reset); > > if (imx_pcie->drvdata->core_reset) > imx_pcie->drvdata->core_reset(imx_pcie, true); > > /* Some boards don't have PCIe reset GPIO. */ > - gpiod_set_value_cansleep(imx_pcie->reset_gpiod, 1); > + if (bridge) > + list_for_each_entry(port, &bridge->ports, list) > + gpiod_set_value_cansleep(port->reset, 1); > } > > static int imx_pcie_deassert_core_reset(struct imx_pcie *imx_pcie) > { > + struct dw_pcie *pci = imx_pcie->pci; > + struct pci_host_bridge *bridge = pci->pp.bridge; > + struct pci_host_port *port; > + > reset_control_deassert(imx_pcie->pciephy_reset); > > if (imx_pcie->drvdata->core_reset) > imx_pcie->drvdata->core_reset(imx_pcie, false); > > /* Some boards don't have PCIe reset GPIO. */ > - if (imx_pcie->reset_gpiod) { > - msleep(100); > - gpiod_set_value_cansleep(imx_pcie->reset_gpiod, 0); > - /* Wait for 100ms after PERST# deassertion (PCIe r5.0, 6.6.1) */ > - msleep(100); > - } > + if (bridge) > + list_for_each_entry(port, &bridge->ports, list) > + if (port->reset) { > + msleep(PCIE_T_PVPERL_MS); > + gpiod_set_value_cansleep(port->reset, 0); > + msleep(PCIE_RESET_CONFIG_WAIT_MS); > + } > > return 0; > } > @@ -1642,11 +1653,39 @@ static const struct dev_pm_ops imx_pcie_pm_ops = { > imx_pcie_resume_noirq) > }; > > +static int imx_pcie_parse_legacy_binding(struct imx_pcie *pcie) > +{ > + struct device *dev = pcie->pci->dev; > + struct pci_host_bridge *bridge = pcie->pci->pp.bridge; > + struct pci_host_port *port; > + struct gpio_desc *reset; > + > + if (!bridge) { > + dev_err(dev, "Bridge not allocated yet\n"); > + return -EINVAL; > + } > + > + reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > + if (IS_ERR(reset)) > + return PTR_ERR(reset); > + > + port = devm_kzalloc(dev, sizeof(*port), GFP_KERNEL); > + if (!port) > + return -ENOMEM; > + > + port->reset = reset; > + INIT_LIST_HEAD(&port->list); > + list_add_tail(&port->list, &bridge->ports); > + > + return 0; > +} > + > static int imx_pcie_probe(struct platform_device *pdev) > { > struct device *dev = &pdev->dev; > struct dw_pcie *pci; > struct imx_pcie *imx_pcie; > + struct pci_host_bridge *bridge; > struct device_node *np; > struct device_node *node = dev->of_node; > int i, ret, domain; > @@ -1688,12 +1727,26 @@ static int imx_pcie_probe(struct platform_device *pdev) > return PTR_ERR(imx_pcie->phy_base); > } > > - /* Fetch GPIOs */ > - imx_pcie->reset_gpiod = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH); > - if (IS_ERR(imx_pcie->reset_gpiod)) > - return dev_err_probe(dev, PTR_ERR(imx_pcie->reset_gpiod), > - "unable to get reset gpio\n"); > - gpiod_set_consumer_name(imx_pcie->reset_gpiod, "PCIe reset"); > + /* For RC mode, allocate bridge early so we can parse Root Ports. */ > + if (imx_pcie->drvdata->mode != DW_PCIE_EP_TYPE) { > + bridge = devm_pci_alloc_host_bridge(dev, 0); > + if (!bridge) > + return -ENOMEM; > + > + pci->pp.bridge = bridge; > + > + /* Parse Root Port nodes */ > + ret = pci_host_common_parse_ports(bridge); > + if (ret) { > + if (ret != -ENOENT) > + return dev_err_probe(dev, ret, "Failed to parse Root Port\n"); > + > + /* Fallback to legacy binding for DT backwards compatibility */ > + ret = imx_pcie_parse_legacy_binding(imx_pcie); > + if (ret) > + return dev_err_probe(dev, ret, "Unable to get reset gpio\n"); > + } > + } if parse in dwc or in devm_pci_alloc_host_bridge(), needn't these code here. Frank > > /* Fetch clocks */ > imx_pcie->num_clks = devm_clk_bulk_get_all(dev, &imx_pcie->clks); > -- > 2.37.1 >