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X-CSE-ConnectionGUID: 9Dr4KHhbRbKIdMrBfPssRA== X-CSE-MsgGUID: 42IfCp+2St+P8CB+LObM2g== X-IronPort-AV: E=McAfee;i="6800,10657,11691"; a="75206463" X-IronPort-AV: E=Sophos;i="6.21,271,1763452800"; d="scan'208";a="75206463" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2026 18:07:34 -0800 X-CSE-ConnectionGUID: 1tjR6wRhSbuhCQUhNU0p6w== X-CSE-MsgGUID: AfhpFH7KRXaz1uThqcsxKg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,271,1763452800"; d="scan'208";a="247626925" Received: from vpanait-mobl.ger.corp.intel.com (HELO localhost) ([10.245.245.168]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 03 Feb 2026 18:07:31 -0800 Date: Wed, 4 Feb 2026 04:07:29 +0200 From: Andy Shevchenko To: rodrigo.alencar@analog.com Cc: linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org, devicetree@vger.kernel.org, Michael Hennerich , Lars-Peter Clausen , Jonathan Cameron , David Lechner , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Subject: Re: [PATCH v3 7/9] iio: amplifiers: ad8366: add device tree support Message-ID: References: <20260203-iio-ad8366-update-v3-0-5d5636b5181a@analog.com> <20260203-iio-ad8366-update-v3-7-5d5636b5181a@analog.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260203-iio-ad8366-update-v3-7-5d5636b5181a@analog.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs, Bertel Jungin Aukio 5, 02600 Espoo On Tue, Feb 03, 2026 at 11:24:13AM +0000, Rodrigo Alencar via B4 Relay wrote: > Add device-tree support by dropping the enum ID in favor of extended > chip info table, containing: > - gain_step, indicating with sign the start of the code range; > - num_channels, to indicate the number IIO channels; > - pack_code() function to describe how SPI buffer is populated; > > With this, switch cases on the device type were dropped: > - probe() function adjusted accordingly; > - Simplified read_raw() and write_raw() callbacks; ... > +static size_t ad8366_pack_code(struct ad8366_state *st) > +{ > + u8 ch_a = bitrev8(st->ch[0]) >> 2; > + u8 ch_b = bitrev8(st->ch[1]) >> 2; > + > + put_unaligned_be16((ch_b << 6) | ch_a, &st->data[0]); > + return 2; With this return it will look better as return sizeof(__be16); Alternatively it can be done via array: u8 ch[] = { bitrev8(st->ch[0]) >> 2, bitrev8(st->ch[1]) >> 2 }; but I find it uglier than the original approach. > +} ... > + const struct ad8366_info *inf = st->info; > + size_t len = 1; > > + if (inf->pack_code) > + len = inf->pack_code(st); > + else > + st->data[0] = st->ch[0]; > > + return spi_write(st->spi, st->data, len); Hmm... What about const struct ad8366_info *inf = st->info; if (inf->pack_code) return spi_write(st->spi, st->data, inf->pack_code(st)); st->data[0] = st->ch[0]; return spi_write(st->spi, st->data, 1); ? ... > struct ad8366_state *st = iio_priv(indio_dev); > + const struct ad8366_info *inf = st->info; > int ret; > + int gain = inf->gain_step > 0 ? inf->gain_min : inf->gain_max; Please, preserve reversed xmas tree order. ... > - {"ada4961", ID_ADA4961}, > - {"adl5240", ID_ADL5240}, > - {"hmc792a", ID_HMC792}, > - {"hmc1119", ID_HMC1119}, > + {"ad8366", (kernel_ulong_t)&ad8366_chip_info}, > + {"ada4961", (kernel_ulong_t)&ada4961_chip_info}, > + {"adl5240", (kernel_ulong_t)&adl5240_chip_info}, > + {"hmc792a", (kernel_ulong_t)&hmc792_chip_info}, > + {"hmc1119", (kernel_ulong_t)&hmc1119_chip_info}, The conversion to chip_info may be split to a separate patch. -- With Best Regards, Andy Shevchenko