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Fri, 06 Feb 2026 04:03:46 -0800 (PST) X-Received: by 2002:a05:6a21:150c:b0:392:e583:b766 with SMTP id adf61e73a8af0-393ad339ac9mr2560231637.42.1770379425888; Fri, 06 Feb 2026 04:03:45 -0800 (PST) Received: from hu-arakshit-hyd.qualcomm.com ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-c6dcb4fbcbdsm2262924a12.4.2026.02.06.04.03.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Feb 2026 04:03:45 -0800 (PST) Date: Fri, 6 Feb 2026 17:33:38 +0530 From: Abhinaba Rakshit To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Manivannan Sadhasivam , "James E.J. Bottomley" , "Martin K. Petersen" , Neeraj Soni , Herbert Xu , "David S. Miller" , Rob Herring , Krzysztof Kozlowski , Conor Dooley , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-scsi@vger.kernel.org, linux-crypto@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH v4 0/4] Enable ICE clock scaling Message-ID: References: <20260128-enable-ufs-ice-clock-scaling-v4-0-260141e8fce6@oss.qualcomm.com> <7b219a50-6971-4a0c-a465-418f8abd5556@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: X-Authority-Analysis: v=2.4 cv=GaoaXAXL c=1 sm=1 tr=0 ts=6985d8a3 cx=c_pps a=oF/VQ+ItUULfLr/lQ2/icg==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=LeY25DUbnqDghkOhmf8A:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=3WC7DwWrALyhR5TkjVHa:22 X-Proofpoint-ORIG-GUID: ZFTTpsM7V_2-HGvFpzfLu0lJPcQ7e_jo X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwMjA2MDA4NCBTYWx0ZWRfXy9WQZ4H6xCZy OSf+uTA5V71990CsdkgjuyE9fZ2OJpoV/WdROXyoZ0JmUBRpV1RsEUCgKltQ2pUOV+ZngRlbJpn XdwnaEkjCdasR/K0vIW6r94OE1t//Kbdns0ZWFrbQwqFV/l3t4XYE+953xjDUivmuraKFRoUnar c5FcWLngMPbd5vjdn39mQYgKxIwlLZlcp5BgDDHs6xTHWQtsKfxTaRBzKjQYfzBJt8yp/7a6DRY wZK2zDSMNTHq4ZEQ0x04838qDPKBbpQgmEm7+uE2AIuvNYcegqe3mTBw/iet2XZiXF1VclxXNLz 82R+RDbV/0J784eD7Zqsz5ctvR5SFT4R17efRkR6wi+RfNy2wep2cbjeyOpp+6xITmNat7FXhlE pUizupEC/W9Qw6/gy3O10AytZav7hDAlt5gi2UnvEd0kyjYCi0WEvPQnLT705D+57kQbwtuoF4q 0pyzDyAYy0v9MjNEL+g== X-Proofpoint-GUID: ZFTTpsM7V_2-HGvFpzfLu0lJPcQ7e_jo X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49 definitions=2026-02-06_03,2026-02-05_03,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 spamscore=0 clxscore=1015 impostorscore=0 phishscore=0 priorityscore=1501 suspectscore=0 malwarescore=0 bulkscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602060084 On Mon, Feb 02, 2026 at 04:01:38PM +0100, Konrad Dybcio wrote: > On 2/2/26 7:36 AM, Abhinaba Rakshit wrote: > > On Thu, Jan 29, 2026 at 01:17:51PM +0100, Konrad Dybcio wrote: > >> On 1/28/26 9:46 AM, Abhinaba Rakshit wrote: > >>> Introduce support for dynamic clock scaling of the ICE (Inline Crypto Engine) > >>> using the OPP framework. During ICE device probe, the driver now attempts to > >>> parse an optional OPP table from the ICE-specific device tree node to > >>> determine minimum and maximum supported frequencies for DVFS-aware operations. > >>> API qcom_ice_scale_clk is exposed by ICE driver and is invoked by UFS host > >>> controller driver in response to clock scaling requests, ensuring coordination > >>> between ICE and host controller. > >>> > >>> For MMC controllers that do not support clock scaling, the ICE clock frequency > >>> is kept aligned with the MMC controller’s clock rate (TURBO) to ensure > >>> consistent operation. > >> > >> You skipped that bit, so I had to do a little digging.. > >> > >> This paragraph sounds scary on the surface, as leaving a TURBO vote hanging > >> would absolutely wreck the power/thermal profile of a running device, > >> however sdhci-msm's autosuspend functions quiesce the ICE by calling > >> qcom_ice_suspend() > >> > >> I think you're missing a dev_pm_opp_set(dev, NULL) or so in that function > >> and a mirrored restore in _resume > > > > Thanks for pointing this out, its an important piece which is missed. > > We can use dev_pm_opp_set_rate(dev, 0/min_freq) in _suspend and restore the > > FWIW > > dev_pm_opp_set_rate(0) will drop the rpmh vote altogether and NOT > disable the clock or change its rate > > dev_pm_opp_set_rate(min_freq) will *lower* the rpmh vote and DO > set_rate (the clock is also left on) > > Konrad > Thanks for the info. I guess, dev_pm_opp_set_rate(dev, 0) seems more ideal as this is API is for full quiesce mode and the clocks are anyway gated in the suspend call (clk_disable_unprepare). Abhinaba Rakshit