From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2602D2F83B5; Sat, 14 Feb 2026 04:48:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771044538; cv=none; b=MFkSHHVRbRIvlB5kxAPMQiSPGqwqWP0e7BNkeqc7l26zwSXC08J4mXdA2Tlq07RSSyT1caFKpHy3b+TPjxYvFDcuuEgJnFABxUSr/hEDbOFo2a8RheErRXFoaCCnbioKSE6ISxSNN4zeFV9HEDmCDxTbg2IztUI08L/kJz9qDkM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771044538; c=relaxed/simple; bh=SWciu1EotfgCtPYvcZhetq4/41qsYpU6LYTorQstCP4=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=AgUY64thTGju1pDtrZLTGjekChv67xVx3hGiuckVNCd9KtnO+qeiEAFql0cV2lkgK8ROmU//pGdmgvjWXiyIK0twrRgbNShPpzdJvQFR2uMV8EUGMOoPyK3v14ClZR5+4X1dr1fjOSJAibo5AM2uboaKm9h9GCGhWYRFv/vWYKE= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=cm4Dbc+c; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="cm4Dbc+c" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 16543C19421; Sat, 14 Feb 2026 04:48:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771044537; bh=SWciu1EotfgCtPYvcZhetq4/41qsYpU6LYTorQstCP4=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=cm4Dbc+cr3k+spSIzdONPIChT99Efjuv8SV8dvRQb+wDhK4lYNjrfVC7WL6wvScp6 CxrdCZRan298qIW56GPrdlelatF6w7A3xe1FRGogqkfh7+AYurnTRGnDVB2mYwJuIK HUSEbujlPyLPV+y17WezDaMMSSpMs+I3kqiecM9vp7HJCvNoa0jUjoW0ilpYbUCPTT RbK6J4+3gLHiLXBVnCv8/XguS3cqs+VHqrT5X55xqpBYShpTyo1oWXeFWVjMN1P5b2 h6tt+18A4u0gySiiSTMeUkWUZIQpwlCz4IHkffTnMag+X8WIdi7cgv9XUdgsKgSb0i UJwI8UCOU210w== Date: Fri, 13 Feb 2026 20:48:55 -0800 From: Drew Fustini To: yunhui cui Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Radim =?utf-8?B?S3LEjW3DocWZ?= , Samuel Holland , Adrien Ricciardi , Nicolas Pitre , Kornel =?utf-8?Q?Dul=C4=99ba?= , Atish Patra , Atish Kumar Patra , Vasudevan Srinivasan , Ved Shanbhogue , Chen Pei , Liu Zhiwei , Weiwei Li , guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn, Reinette Chatre , Tony Luck , Babu Moger , Peter Newman , Fenghua Yu , James Morse , Ben Horgan , Dave Martin , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, x86@kernel.org, Rob Herring , "Rafael J. Wysocki" , Len Brown , Robert Moore , Sunil V L , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev, devicetree@vger.kernel.org Subject: Re: [External] [PATCH RFC v2 16/17] acpi: riscv: Parse RISC-V Quality of Service Controller (RQSC) table Message-ID: References: <20260128-ssqosid-cbqri-v2-0-dca586b091b9@kernel.org> <20260128-ssqosid-cbqri-v2-16-dca586b091b9@kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: On Mon, Feb 02, 2026 at 07:08:48PM +0800, yunhui cui wrote: > Hi Drew, > > On Thu, Jan 29, 2026 at 4:28 AM Drew Fustini wrote: > > > > Add driver to parse the ACPI RISC-V Quality of Service Controller (RQSC) > > table which describes the capacity and bandwidth QoS controllers in a > > system. The QoS controllers implement the RISC-V Capacity and Bandwidth > > Controller QoS Register Interface (CBQRI) specification. > > > > Link: https://github.com/riscv-non-isa/riscv-cbqri/releases/tag/v1.0 > > Link: https://github.com/riscv-non-isa/riscv-rqsc/blob/main/src/ > > Signed-off-by: Drew Fustini > > --- > > MAINTAINERS | 1 + > > arch/riscv/include/asm/acpi.h | 10 ++++ > > drivers/acpi/riscv/Makefile | 2 +- > > drivers/acpi/riscv/rqsc.c | 112 ++++++++++++++++++++++++++++++++++++++++++ > > 4 files changed, 124 insertions(+), 1 deletion(-) > > > > diff --git a/MAINTAINERS b/MAINTAINERS > > index 96ead357a634..e96a83dc9a02 100644 > > --- a/MAINTAINERS > > +++ b/MAINTAINERS > > @@ -22512,6 +22512,7 @@ S: Supported > > F: arch/riscv/include/asm/qos.h > > F: arch/riscv/include/asm/resctrl.h > > F: arch/riscv/kernel/qos/ > > +F: drivers/acpi/riscv/rqsc.c > > F: include/linux/riscv_qos.h > > > > RISC-V RPMI AND MPXY DRIVERS > > diff --git a/arch/riscv/include/asm/acpi.h b/arch/riscv/include/asm/acpi.h > > index 6e13695120bc..16c6e25eed1e 100644 > > --- a/arch/riscv/include/asm/acpi.h > > +++ b/arch/riscv/include/asm/acpi.h > > @@ -71,6 +71,16 @@ int acpi_get_riscv_isa(struct acpi_table_header *table, > > > > void acpi_get_cbo_block_size(struct acpi_table_header *table, u32 *cbom_size, > > u32 *cboz_size, u32 *cbop_size); > > + > > +#ifdef CONFIG_RISCV_ISA_SSQOSID > > +int acpi_parse_rqsc(struct acpi_table_header *table); > > +#else > > +static inline int acpi_parse_rqsc(struct acpi_table_header *table) > > +{ > > + return -EINVAL; > > +} > > +#endif /* CONFIG_RISCV_ISA_SSQOSID */ > > + > > #else > > static inline void acpi_init_rintc_map(void) { } > > static inline struct acpi_madt_rintc *acpi_cpu_get_madt_rintc(int cpu) > > diff --git a/drivers/acpi/riscv/Makefile b/drivers/acpi/riscv/Makefile > > index 1284a076fa88..cf0f38c93a9f 100644 > > --- a/drivers/acpi/riscv/Makefile > > +++ b/drivers/acpi/riscv/Makefile > > @@ -1,5 +1,5 @@ > > # SPDX-License-Identifier: GPL-2.0-only > > -obj-y += rhct.o init.o irq.o > > +obj-y += rhct.o rqsc.o init.o irq.o > > obj-$(CONFIG_ACPI_PROCESSOR_IDLE) += cpuidle.o > > obj-$(CONFIG_ACPI_CPPC_LIB) += cppc.o > > obj-$(CONFIG_ACPI_RIMT) += rimt.o > > diff --git a/drivers/acpi/riscv/rqsc.c b/drivers/acpi/riscv/rqsc.c > > new file mode 100644 > > index 000000000000..a86ddb39fae4 > > --- /dev/null > > +++ b/drivers/acpi/riscv/rqsc.c > > @@ -0,0 +1,112 @@ > > +// SPDX-License-Identifier: GPL-2.0-only > > +/* > > + * Copyright (C) 2025 Tenstorrent > > + * Author: Drew Fustini > > + * > > + */ > > + > > +#define pr_fmt(fmt) "ACPI: RQSC: " fmt > > + > > +#include > > +#include > > +#include > > + > > +#ifdef CONFIG_RISCV_ISA_SSQOSID > > + > > +#define CBQRI_CTRL_SIZE 0x1000 > > + > > +static struct acpi_table_rqsc *acpi_get_rqsc(void) > > +{ > > + static struct acpi_table_header *rqsc; > > + acpi_status status; > > + > > + /* > > + * RQSC will be used at runtime on every CPU, so we > > + * don't need to call acpi_put_table() to release the table mapping. > > + */ > > + if (!rqsc) { > > + status = acpi_get_table(ACPI_SIG_RQSC, 0, &rqsc); > > + if (ACPI_FAILURE(status)) { > > + pr_warn_once("No RQSC table found\n"); > > + return NULL; > > + } > > + } > > + > > + return (struct acpi_table_rqsc *)rqsc; > > +} > > + > > +int acpi_parse_rqsc(struct acpi_table_header *table) > > +{ > > + struct acpi_table_rqsc *rqsc; > > + int err; > > + > > + BUG_ON(acpi_disabled); > > + if (!table) { > > + rqsc = acpi_get_rqsc(); > > + if (!rqsc) > > + return -ENOENT; > > + } else { > > + rqsc = (struct acpi_table_rqsc *)table; > > + } > > + > > + for (int i = 0; i < rqsc->num; i++) { > > + struct cbqri_controller_info *ctrl_info; > > + > > + ctrl_info = kzalloc(sizeof(*ctrl_info), GFP_KERNEL); > > + if (!ctrl_info) > > + return -ENOMEM; > > + > > + ctrl_info->type = rqsc->f[i].type; > > + ctrl_info->addr = rqsc->f[i].reg[1]; > > + ctrl_info->size = CBQRI_CTRL_SIZE; > > + ctrl_info->rcid_count = rqsc->f[i].rcid; > > + ctrl_info->mcid_count = rqsc->f[i].mcid; > > + > > + pr_info("Found controller with type %u addr 0x%lx size %lu rcid %u mcid %u", > > + ctrl_info->type, ctrl_info->addr, ctrl_info->size, > > + ctrl_info->rcid_count, ctrl_info->mcid_count); > > + > > + if (ctrl_info->type == CBQRI_CONTROLLER_TYPE_CAPACITY) { > > + ctrl_info->cache.cache_id = rqsc->f[i].res.id1; > > + ctrl_info->cache.cache_level = > > + find_acpi_cache_level_from_id(ctrl_info->cache.cache_id); > > + > > + struct acpi_pptt_cache *cache; > > + > > + cache = find_acpi_cache_from_id(ctrl_info->cache.cache_id); > > + if (cache) { > > + ctrl_info->cache.cache_size = cache->size; > > + } else { > > + pr_warn("%s(): failed to determine size for cache id 0x%x", > > + __func__, ctrl_info->cache.cache_id); > > + ctrl_info->cache.cache_size = 0; > > + } > > + > > + pr_info("Cache controller has ID 0x%x level %u size %u ", > > + ctrl_info->cache.cache_id, ctrl_info->cache.cache_level, > > + ctrl_info->cache.cache_size); > > + > > + /* > > + * For CBQRI, any cpu (technically a hart in RISC-V terms) > > + * can access the memory-mapped registers of any CBQRI > > + * controller in the system. > > + */ > > + err = cpumask_parse("FF", &ctrl_info->cache.cpu_mask); > > Hardcode? acpi_pptt_get_cpumask_from_cache_id(ctrl_info->cache.cache_id, > &ctrl_info->cache.cpu_mask); ? Thank you, I'll switch to using that. Drew