From: Richard Acayan <mailingradian@gmail.com>
To: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Cc: Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>,
Conor Dooley <conor@kernel.org>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 2/3] soc: qcom: llcc: Add configuration data for SDM670
Date: Tue, 10 Feb 2026 19:32:35 -0500 [thread overview]
Message-ID: <aYvOI36EN8nT6ung@rdacayan> (raw)
In-Reply-To: <e35d7795-cca2-402d-8179-8214d81ff9d2@oss.qualcomm.com>
On Tue, Feb 10, 2026 at 10:29:16AM +0100, Konrad Dybcio wrote:
> On 2/10/26 3:19 AM, Richard Acayan wrote:
> > Add system cache table and configs for the SDM670 SoC.
> >
> > Signed-off-by: Richard Acayan <mailingradian@gmail.com>
> > ---
>
> [...]
>
> > +static const struct qcom_llcc_config sdm670_cfg[] = {
> > + {
> > + .sct_data = sdm670_data,
> > + .size = ARRAY_SIZE(sdm670_data),
> > + .skip_llcc_cfg = true,
> > + .reg_offset = llcc_v1_reg_offset,
> > + .edac_reg_offset = &llcc_v1_edac_reg_offset,
> > + .no_edac = true,
>
> Does the EDAC driver crash the device?
Yes, this is needed if the EDAC driver is an available module.
next prev parent reply other threads:[~2026-02-11 0:32 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-10 2:19 [PATCH 0/3] SDM670 cache controller support Richard Acayan
2026-02-10 2:19 ` [PATCH 1/3] dt-bindings: cache: qcom,llcc: Add SDM670 compatible Richard Acayan
2026-02-10 9:27 ` Krzysztof Kozlowski
2026-02-10 2:19 ` [PATCH 2/3] soc: qcom: llcc: Add configuration data for SDM670 Richard Acayan
2026-02-10 9:27 ` Konrad Dybcio
2026-02-11 19:21 ` Richard Acayan
2026-02-12 10:06 ` Konrad Dybcio
2026-02-10 9:29 ` Konrad Dybcio
2026-02-11 0:32 ` Richard Acayan [this message]
2026-02-10 2:19 ` [PATCH 3/3] arm64: dts: qcom: sdm670: add llcc Richard Acayan
2026-02-10 9:28 ` Konrad Dybcio
2026-03-16 2:02 ` (subset) [PATCH 0/3] SDM670 cache controller support Bjorn Andersson
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