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Wed, 11 Feb 2026 11:20:45 -0800 (PST) Date: Wed, 11 Feb 2026 14:21:12 -0500 From: Richard Acayan To: Konrad Dybcio Cc: Bjorn Andersson , Konrad Dybcio , Conor Dooley , Jonathan Cameron , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 2/3] soc: qcom: llcc: Add configuration data for SDM670 Message-ID: References: <20260210021957.13357-1-mailingradian@gmail.com> <20260210021957.13357-3-mailingradian@gmail.com> <026ce34c-c880-4832-a791-656fb245a495@oss.qualcomm.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <026ce34c-c880-4832-a791-656fb245a495@oss.qualcomm.com> On Tue, Feb 10, 2026 at 10:27:40AM +0100, Konrad Dybcio wrote: > On 2/10/26 3:19 AM, Richard Acayan wrote: > > Add system cache table and configs for the SDM670 SoC. > > > > Signed-off-by: Richard Acayan > > --- > > I have a clone of some msm-4.9 on my ssd and it roughly matches this > patch > > However > > In docs, I see a version with only CPU_SS, MODEM and MMUHWT left > (your settings here seem to match), dated later than the last commit > to llcc-sdm670.c in that downstream kernel clone.. > > Because this SoC seems to only have 512KiB of LLC in total, it may > be that it was found in testing for that configuration to have a > better perf profile > > Could you please give it a shot and check if you see any immediate > gains/losses? I don't notice a difference outside the margin of error. The Unixbench workload reported 4550.4 with all configs, and 4550.9 with only LLCC_CPUSS, LLCC_MDM, and LLCC_MMUHWT. My 15-second workload on Hexagon/CDSP was half a second faster when commenting out the cache use cases. I don't see better startup times either.