From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 58D431C69D; Tue, 17 Feb 2026 18:28:49 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771352929; cv=none; b=iLy427iTbjvO4utaHBrUyIY+nSR1UNY+tEU12LYBPR/gDNV50uy+fjLNjZ4ccXkTNL/ULfnsauKyEMhgJJlERANGkRnQAUQ4VsmUBLyTW1w7y9KE6QMbIjajBOio/y/4NT09h1O5zply7/Tn9XSyVOeb7UGV+2UzsC6qaDpfkSQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1771352929; c=relaxed/simple; bh=6VEW5d7AQFJxxetsXBI84a7st2FxJT4K5c5ALxF0BlE=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=jcVFZCk/GSX02DMHklsgdnWnEm2+486JLZUWTe5Yl1IK9bijTCpGq3D+6y9LBIpTWl0kRo+0DXDTjM/jRW35GmVnZ239YcI5EqvLDe0oBjY2HrXSeMcdPbytNDcL/v/xjkO+rPksbYnIDOov2kaYR+6kzUJIyeXVa5IwD2ZrboI= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nP4xUFSL; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nP4xUFSL" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 4E0EFC4CEF7; Tue, 17 Feb 2026 18:28:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1771352928; bh=6VEW5d7AQFJxxetsXBI84a7st2FxJT4K5c5ALxF0BlE=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=nP4xUFSLToWnOwwa4nhEUkF5sMvpVR7KgCPHfM5ocvrhmdQ2qdKf3rGu6kGOB3j5n hjWBs0euPbe56pJK4oYINPNhuTSnzogVtM8Ms2p3I1NLofyMLPVSxUhkOvC+jxotKy jxBj/EOajDew9rXSQMNdQJ+4+N2VTKnUeOIXFLxsE85z6wkqRFoV7JOYawVsA++mn4 FJi0HSs5vAUP/s9og47Tdw7ofCy5jYe1gVjRnQMOntrLbLxMN4h3GeWXiLOB2q0Nfs 2YxcjZTtybCIjgtdTL9nBKBT+JbqrbI2SWBbejs8A+ea3hiBTN3hdMoV+d8SAALbhS cwDRpS+QRNn/A== Date: Tue, 17 Feb 2026 10:28:52 -0800 From: Drew Fustini To: Reinette Chatre Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Radim =?utf-8?B?S3LEjW3DocWZ?= , Samuel Holland , Adrien Ricciardi , Nicolas Pitre , Kornel =?utf-8?Q?Dul=C4=99ba?= , Atish Patra , Atish Kumar Patra , Vasudevan Srinivasan , Ved Shanbhogue , yunhui cui , Chen Pei , Liu Zhiwei , Weiwei Li , guo.wenjia23@zte.com.cn, liu.qingtao2@zte.com.cn, Tony Luck , Babu Moger , Peter Newman , Fenghua Yu , James Morse , Ben Horgan , Dave Martin , linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org, x86@kernel.org, Rob Herring , "Rafael J. Wysocki" , Len Brown , Robert Moore , Sunil V L , Krzysztof Kozlowski , Conor Dooley , Paul Walmsley , linux-acpi@vger.kernel.org, acpica-devel@lists.linux.dev, devicetree@vger.kernel.org Subject: Re: [PATCH RFC v2 05/17] RISC-V: QoS: define CBQRI capacity and bandwidth capabilities Message-ID: References: <20260128-ssqosid-cbqri-v2-0-dca586b091b9@kernel.org> <20260128-ssqosid-cbqri-v2-5-dca586b091b9@kernel.org> <3f53c823-74ab-46c3-9cf0-c28b062f2c89@intel.com> <0ba158fc-0c44-4b83-b733-9fc00c4d7f3a@intel.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <0ba158fc-0c44-4b83-b733-9fc00c4d7f3a@intel.com> On Tue, Feb 17, 2026 at 08:32:41AM -0800, Reinette Chatre wrote: > Hi Drew, > > On 2/14/26 8:25 AM, Drew Fustini wrote: > > On Fri, Feb 13, 2026 at 03:13:42PM -0800, Reinette Chatre wrote: > >> Hi Drew, > > > > Hi! Thanks for your detailed feedback on this series. > > > >> On 1/28/26 12:27 PM, Drew Fustini wrote: > >>> Define data structures to store the capacity and bandwidth capabilities > >>> that are discovered for a CBQRI-capable controller. > >>> > >>> Co-developed-by: Adrien Ricciardi > >>> Signed-off-by: Adrien Ricciardi > >>> Signed-off-by: Drew Fustini > >>> --- > >>> arch/riscv/kernel/qos/internal.h | 128 +++++++++++++++++++++++++++++++++++++++ > >>> 1 file changed, 128 insertions(+) > >>> > >>> diff --git a/arch/riscv/kernel/qos/internal.h b/arch/riscv/kernel/qos/internal.h > >>> new file mode 100644 > >>> index 000000000000..ff2c7eff50be > >>> --- /dev/null > >>> +++ b/arch/riscv/kernel/qos/internal.h > >>> @@ -0,0 +1,128 @@ > >>> +/* SPDX-License-Identifier: GPL-2.0-only */ > >>> +#ifndef _ASM_RISCV_QOS_INTERNAL_H > >>> +#define _ASM_RISCV_QOS_INTERNAL_H > >>> + > >>> +#include > >> > >> The include caught my eye but I did not notice any additions in this patch > >> refer to it. > >> > >> Reinette > >> > > > > I was using this to make resctrl structs available in the code that > > includdes this header: > > > > arch/riscv/kernel/qos/qos.c > > arch/riscv/kernel/qos/qos_resctrl.c > > I see. The changelog made me believe that this patch defines new data structures > used by the patches that follow and the inclusion of resctrl.h created expectation > that some of these new data structures contain resctrl members that I was interested > in seeing used. If keeping this style then a snippet in changelog that explains the > header inclusion/organization would be helpful. > > > Should I rearrange to include resctrl.h directly where it is needed? > I'll defer to the RISC-V folks since I understand that not all subsystems follow/enforce > rule #1 of Documentation/process/submit-checklist.rst the same (also called "Include > What You Use (IWYU)") quoted for convenience: > > 1) If you use a facility then #include the file that defines/declares > that facility. Don't depend on other header files pulling in ones > that you use. > > I have worked with code following different customs and personally I do find code > following IWYU easier to maintain. Thank you for the explanation. I agree that IWYU makes more sense so I'll rearrange how I do includes in the series. BTW, I'm working through all the comments in patch 8. In short, there are a lot of shortcomings in my current implementation that need to be fixed and I will explain in my reply how I plan to address them. Drew