* [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe LEDs
@ 2025-10-01 6:50 Wolfram Sang
2026-03-10 8:19 ` Wolfram Sang
0 siblings, 1 reply; 2+ messages in thread
From: Wolfram Sang @ 2025-10-01 6:50 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Wolfram Sang, Geert Uytterhoeven, Magnus Damm, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, devicetree
To be able to use the LEDs, a configuration switch has to be set to a
non-default value. So, infrastructure to support these switches (which
modify signal routing via the CPLD on the demo board (DB)) is added as
well.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Changes since RFC:
* renamed the include guard
* improved the comment explaining SW2-2
* renamed the define to 'DB_SW2_2'
Notes: I kept the name for the header file because the switch is on the
DB board. Adding "EB" doesn't really add something IMO because the DB
might sit on another carrier board theoretically.
Depends on "[PATCH v4 5/8] ARM: dts: r9a06g032: Add GPIO controllers"
which is still in-flight.
I wonder if this needs to be split into two patches (DB and EB part)?
.../renesas/r9a06g032-rzn1d400-db-switches.h | 21 +++++++++++++
.../dts/renesas/r9a06g032-rzn1d400-db.dts | 30 +++++++++++++++++++
.../dts/renesas/r9a06g032-rzn1d400-eb.dts | 19 ++++++++++++
3 files changed, 70 insertions(+)
create mode 100644 arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db-switches.h
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db-switches.h b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db-switches.h
new file mode 100644
index 000000000000..c6f9c27d286a
--- /dev/null
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db-switches.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
+/*
+ * On-board switches for the Renesas RZ/N1D demo board (DB)
+ *
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+#ifndef __R9A06G032_RZN1D400_DB_SWITCHES_H
+#define __R9A06G032_RZN1D400_DB_SWITCHES_H
+
+#define SW_OFF 0
+#define SW_ON 1
+
+/*
+ * SW2-2:
+ * SW_OFF - enable ALT0_PMOD (PMOD1-3 + LEDs on the extension board)
+ * SW_ON (default) - enable ALT1_CAT_S3 (CAT/S3)
+ */
+#define DB_SW2_2 SW_ON
+
+#endif
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 3258b2e27434..c3786d54992a 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -15,6 +15,7 @@
#include <dt-bindings/pinctrl/rzn1-pinctrl.h>
#include "r9a06g032.dtsi"
+#include "r9a06g032-rzn1d400-db-switches.h"
/ {
model = "RZN1D-DB Board";
@@ -185,6 +186,14 @@ fixed-link {
};
};
+#if DB_SW2_2 == SW_OFF
+&gpio1 {
+ pinctrl-0 = <&pins_gpio1>;
+ pinctrl-names = "default";
+ status = "okay";
+};
+#endif
+
&i2c2 {
pinctrl-0 = <&pins_i2c2>;
pinctrl-names = "default";
@@ -256,6 +265,27 @@ pins_cpld: pins-cpld {
<RZN1_PINMUX(122, RZN1_FUNC_USB)>;
};
+#if DB_SW2_2 == SW_OFF
+ pins_gpio1: pins-gpio1 {
+ pinmux = <RZN1_PINMUX(80, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(81, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(82, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(83, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(84, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(85, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(86, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(87, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(88, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(89, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(90, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(91, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(92, RZN1_FUNC_GPIO)>,
+ <RZN1_PINMUX(93, RZN1_FUNC_GPIO)>;
+ drive-strength = <12>;
+ bias-disable;
+ };
+#endif
+
pins_eth3: pins_eth3 {
pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
<RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
index 97a339b30d76..5dbc09ac286f 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-eb.dts
@@ -8,11 +8,30 @@
#include <dt-bindings/leds/common.h>
#include "r9a06g032-rzn1d400-db.dts"
+#include "r9a06g032-rzn1d400-db-switches.h"
/ {
model = "RZN1D-EB Board";
compatible = "renesas,rzn1d400-eb", "renesas,rzn1d400-db",
"renesas,r9a06g032";
+
+#if DB_SW2_2 == SW_OFF
+ leds {
+ compatible = "gpio-leds";
+
+ led-prog0 {
+ gpios = <&gpio1b 23 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_GREEN>;
+ function = LED_FUNCTION_PROGRAMMING;
+ };
+
+ led-prog1 {
+ gpios = <&gpio1b 24 GPIO_ACTIVE_HIGH>;
+ color = <LED_COLOR_ID_RED>;
+ function = LED_FUNCTION_PROGRAMMING;
+ };
+ };
+#endif
};
&gmac1 {
--
2.47.2
^ permalink raw reply related [flat|nested] 2+ messages in thread
* Re: [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe LEDs
2025-10-01 6:50 [PATCH] ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe LEDs Wolfram Sang
@ 2026-03-10 8:19 ` Wolfram Sang
0 siblings, 0 replies; 2+ messages in thread
From: Wolfram Sang @ 2026-03-10 8:19 UTC (permalink / raw)
To: linux-renesas-soc
Cc: Geert Uytterhoeven, Magnus Damm, Rob Herring, Krzysztof Kozlowski,
Conor Dooley, devicetree
[-- Attachment #1: Type: text/plain, Size: 1019 bytes --]
Hi all,
On Wed, Oct 01, 2025 at 08:50:01AM +0200, Wolfram Sang wrote:
> To be able to use the LEDs, a configuration switch has to be set to a
> non-default value. So, infrastructure to support these switches (which
> modify signal routing via the CPLD on the demo board (DB)) is added as
> well.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
I want to discard this patch.
Actually, I share Rob's view. The state of the switches can be read and
the firmware should handle it. Dunno if I will ever have the time
implementing that, but it sounds somewhat interesting, at least.
Also, currently for the whole kernel, only Renesas RZ has #ifdeffery in
DTS files to handle switches. Dunno if those can be read, too, but it
feels strange. A bit like a bad citizen.
So, for now, I think the way to go is for N1D: upstream only changes
which are available using the default switch settings. Until switch
handling gets implemented.
Opinions?
Happy hacking,
Wolfram
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