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Date: Tue, 15 Oct 2024 16:13:13 +0100
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Subject: Re: [PATCH RFC 2/2] iommu/arm-smmu-v3: Bypass SID0 for NXP i.MX95
To: Jason Gunthorpe <jgg@ziepe.ca>, Pranjal Shrivastava <praan@google.com>
Cc: "Peng Fan (OSS)" <peng.fan@oss.nxp.com>, Will Deacon <will@kernel.org>,
 Joerg Roedel <joro@8bytes.org>, Rob Herring <robh@kernel.org>,
 Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley
 <conor+dt@kernel.org>, Joy Zou <joy.zou@nxp.com>,
 linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
 devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
 Peng Fan <peng.fan@nxp.com>
References: <20241015-smmuv3-v1-0-e4b9ed1b5501@nxp.com>
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 <20241015124723.GI1825128@ziepe.ca>
From: Robin Murphy <robin.murphy@arm.com>
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On 2024-10-15 1:47 pm, Jason Gunthorpe wrote:
> On Tue, Oct 15, 2024 at 08:13:28AM +0000, Pranjal Shrivastava wrote:
> 
>> Umm.. this was specific for rmr not a generic thing. I'd suggest to
>> avoid meddling with the STEs directly for acheiving bypass. Playing
>> with the iommu domain type could be neater. Perhaps, modify the
>> ops->def_domain_type to return an appropriate domain?
> 
> Yeah, that is the expected way, to force the def_domain_type to
> IDENTITY and refuse to attach a PAGING/BLOCKED domain.

There is no domain, this is bypassing an arbitrary StreamID not 
associated with any device. Which incidentally is something an IORT RMR 
can quite happily achieve already (I think the DT reserved-memory 
binding does need a proper device node to relate to, though).

Thanks,
Robin.