* [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document Milos compatible
2026-03-20 8:09 [PATCH v2 0/3] Add CCI support for Milos, enable on Fairphone (Gen. 6) Luca Weiss
@ 2026-03-20 8:09 ` Luca Weiss
2026-03-20 21:14 ` Wolfram Sang
2026-03-20 8:09 ` [PATCH v2 2/3] arm64: dts: qcom: milos: Add CCI busses Luca Weiss
2026-03-20 8:09 ` [PATCH v2 3/3] arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on " Luca Weiss
2 siblings, 1 reply; 5+ messages in thread
From: Luca Weiss @ 2026-03-20 8:09 UTC (permalink / raw)
To: Loic Poulain, Robert Foss, Andi Shyti, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-i2c, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss, Krzysztof Kozlowski
Add Milos compatible for the CAMSS CCI interfaces.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
.../devicetree/bindings/i2c/qcom,i2c-cci.yaml | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
index 399a09409e07..816c1a48edd3 100644
--- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
+++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml
@@ -27,6 +27,7 @@ properties:
- items:
- enum:
- qcom,kaanapali-cci
+ - qcom,milos-cci
- qcom,qcm2290-cci
- qcom,qcs8300-cci
- qcom,sa8775p-cci
@@ -265,6 +266,23 @@ allOf:
- const: cpas_ahb
- const: cci
+ - if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - qcom,milos-cci
+ then:
+ properties:
+ clocks:
+ minItems: 3
+ maxItems: 3
+ clock-names:
+ items:
+ - const: soc_ahb
+ - const: cpas_ahb
+ - const: cci
+
additionalProperties: false
examples:
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* Re: [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document Milos compatible
2026-03-20 8:09 ` [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document Milos compatible Luca Weiss
@ 2026-03-20 21:14 ` Wolfram Sang
0 siblings, 0 replies; 5+ messages in thread
From: Wolfram Sang @ 2026-03-20 21:14 UTC (permalink / raw)
To: Luca Weiss
Cc: Loic Poulain, Robert Foss, Andi Shyti, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio,
~postmarketos/upstreaming, phone-devel, linux-i2c, linux-arm-msm,
devicetree, linux-kernel, Krzysztof Kozlowski
[-- Attachment #1: Type: text/plain, Size: 284 bytes --]
On Fri, Mar 20, 2026 at 09:09:49AM +0100, Luca Weiss wrote:
> Add Milos compatible for the CAMSS CCI interfaces.
>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
> Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Applied to for-next, thanks!
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2 2/3] arm64: dts: qcom: milos: Add CCI busses
2026-03-20 8:09 [PATCH v2 0/3] Add CCI support for Milos, enable on Fairphone (Gen. 6) Luca Weiss
2026-03-20 8:09 ` [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document Milos compatible Luca Weiss
@ 2026-03-20 8:09 ` Luca Weiss
2026-03-20 8:09 ` [PATCH v2 3/3] arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on " Luca Weiss
2 siblings, 0 replies; 5+ messages in thread
From: Luca Weiss @ 2026-03-20 8:09 UTC (permalink / raw)
To: Loic Poulain, Robert Foss, Andi Shyti, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-i2c, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss
Add the nodes and the pinctrl for the CCI I2C busses on the Milos SoC.
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/milos.dtsi | 194 ++++++++++++++++++++++++++++++++++++
1 file changed, 194 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/milos.dtsi b/arch/arm64/boot/dts/qcom/milos.dtsi
index 35248fa30747..4dbcd0147587 100644
--- a/arch/arm64/boot/dts/qcom/milos.dtsi
+++ b/arch/arm64/boot/dts/qcom/milos.dtsi
@@ -1742,6 +1742,72 @@ videocc: clock-controller@aaf0000 {
#power-domain-cells = <1>;
};
+ cci0: cci@ac15000 {
+ compatible = "qcom,milos-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x0ac15000 0x0 0x1000>;
+ interrupts = <GIC_SPI 426 IRQ_TYPE_EDGE_RISING 0>;
+ power-domains = <&camcc CAM_CC_CAMSS_TOP_GDSC>;
+ clocks = <&camcc CAM_CC_SOC_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CCI_0_CLK>;
+ clock-names = "soc_ahb",
+ "cpas_ahb",
+ "cci";
+ pinctrl-0 = <&cci0_0_default &cci0_1_default>;
+ pinctrl-1 = <&cci0_0_sleep &cci0_1_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cci0_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci0_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
+ cci1: cci@ac16000 {
+ compatible = "qcom,milos-cci", "qcom,msm8996-cci";
+ reg = <0x0 0x0ac16000 0x0 0x1000>;
+ interrupts = <GIC_SPI 427 IRQ_TYPE_EDGE_RISING 0>;
+ power-domains = <&camcc CAM_CC_CAMSS_TOP_GDSC>;
+ clocks = <&camcc CAM_CC_SOC_AHB_CLK>,
+ <&camcc CAM_CC_CPAS_AHB_CLK>,
+ <&camcc CAM_CC_CCI_1_CLK>;
+ clock-names = "soc_ahb",
+ "cpas_ahb",
+ "cci";
+ pinctrl-0 = <&cci1_0_default &cci1_1_default>;
+ pinctrl-1 = <&cci1_0_sleep &cci1_1_sleep>;
+ pinctrl-names = "default", "sleep";
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cci1_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci1_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <1000000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
camcc: clock-controller@adb0000 {
compatible = "qcom,milos-camcc";
reg = <0x0 0x0adb0000 0x0 0x40000>;
@@ -1989,6 +2055,134 @@ data-pins {
bias-pull-up;
};
};
+
+ cci0_0_default: cci0-0-default-state {
+ sda-pins {
+ pins = "gpio88";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio89";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci0_0_sleep: cci0-0-sleep-state {
+ sda-pins {
+ pins = "gpio88";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio89";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci0_1_default: cci0-1-default-state {
+ sda-pins {
+ pins = "gpio90";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio91";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci0_1_sleep: cci0-1-sleep-state {
+ sda-pins {
+ pins = "gpio90";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio91";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci1_0_default: cci1-0-default-state {
+ sda-pins {
+ pins = "gpio92";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio93";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci1_0_sleep: cci1-0-sleep-state {
+ sda-pins {
+ pins = "gpio92";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio93";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
+
+ cci1_1_default: cci1-1-default-state {
+ sda-pins {
+ pins = "gpio94";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+
+ scl-pins {
+ pins = "gpio95";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-up = <2200>;
+ };
+ };
+
+ cci1_1_sleep: cci1-1-sleep-state {
+ sda-pins {
+ pins = "gpio94";
+ function = "cci_i2c_sda";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+
+ scl-pins {
+ pins = "gpio95";
+ function = "cci_i2c_scl";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
+ };
};
apps_smmu: iommu@15000000 {
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v2 3/3] arm64: dts: qcom: milos-fairphone-fp6: Add camera EEPROMs on CCI busses
2026-03-20 8:09 [PATCH v2 0/3] Add CCI support for Milos, enable on Fairphone (Gen. 6) Luca Weiss
2026-03-20 8:09 ` [PATCH v2 1/3] dt-bindings: i2c: qcom-cci: Document Milos compatible Luca Weiss
2026-03-20 8:09 ` [PATCH v2 2/3] arm64: dts: qcom: milos: Add CCI busses Luca Weiss
@ 2026-03-20 8:09 ` Luca Weiss
2 siblings, 0 replies; 5+ messages in thread
From: Luca Weiss @ 2026-03-20 8:09 UTC (permalink / raw)
To: Loic Poulain, Robert Foss, Andi Shyti, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, Bjorn Andersson, Konrad Dybcio
Cc: ~postmarketos/upstreaming, phone-devel, linux-i2c, linux-arm-msm,
devicetree, linux-kernel, Luca Weiss, Konrad Dybcio
Enable the CCI I2C busses and add nodes for the EEPROMs found on the
camera that are connected there.
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
---
arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts | 50 ++++++++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
index bba327cc7a38..3e65f5deb5a6 100644
--- a/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
+++ b/arch/arm64/boot/dts/qcom/milos-fairphone-fp6.dts
@@ -541,6 +541,56 @@ vreg_l11f: ldo11 {
};
};
+&cci0 {
+ status = "okay";
+};
+
+&cci0_i2c0 {
+ /* Main cam: Sony IMX896 @ 0x1a */
+
+ eeprom@50 {
+ compatible = "puya,p24c128f", "atmel,24c128";
+ reg = <0x50>;
+ vcc-supply = <&vreg_l6p>;
+ read-only;
+ };
+
+ /* Dongwoon DW9784 VCM/OIS @ 0x72 */
+};
+
+
+&cci0_i2c1 {
+ /* Awinic AW86017 VCM @ 0x0c */
+ /* UW cam: OmniVision OV13B10 @ 0x36 */
+
+ eeprom@52 {
+ compatible = "puya,p24c128f", "atmel,24c128";
+ reg = <0x52>;
+ vcc-supply = <&vreg_l6p>;
+ read-only;
+ };
+};
+
+&cci1 {
+ /* cci1_i2c0 is not used for CCI */
+ pinctrl-0 = <&cci1_1_default>;
+ pinctrl-1 = <&cci1_1_sleep>;
+
+ status = "okay";
+};
+
+&cci1_i2c1 {
+ /* Awinic AW86016 VCM @ 0x0c */
+ /* Front cam: Samsung S5KKD1 @ 0x3d */
+
+ eeprom@51 {
+ compatible = "puya,p24c128f", "atmel,24c128";
+ reg = <0x51>;
+ vcc-supply = <&vreg_l6p>;
+ read-only;
+ };
+};
+
&gcc {
protected-clocks = <GCC_PCIE_1_AUX_CLK>, <GCC_PCIE_1_AUX_CLK_SRC>,
<GCC_PCIE_1_CFG_AHB_CLK>, <GCC_PCIE_1_MSTR_AXI_CLK>,
--
2.53.0
^ permalink raw reply related [flat|nested] 5+ messages in thread