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[78.88.45.245]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b353fa65a62sm126307366b.47.2025.09.25.02.10.09 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 25 Sep 2025 02:10:10 -0700 (PDT) Message-ID: Date: Thu, 25 Sep 2025 11:10:08 +0200 Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 5/8] media: iris: Move vpu register defines to common header file To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Philipp Zabel Cc: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Vishnu Reddy References: <20250925-knp_video-v1-0-e323c0b3c0cd@oss.qualcomm.com> <20250925-knp_video-v1-5-e323c0b3c0cd@oss.qualcomm.com> Content-Language: en-US From: Konrad Dybcio In-Reply-To: <20250925-knp_video-v1-5-e323c0b3c0cd@oss.qualcomm.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: nlzUoH0wsqF83JYDDPbQ0UnrjtOO7Eb3 X-Authority-Analysis: v=2.4 cv=RO2zH5i+ c=1 sm=1 tr=0 ts=68d506fc cx=c_pps a=50t2pK5VMbmlHzFWWp8p/g==:117 a=FpWmc02/iXfjRdCD7H54yg==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=COk6AnOGAAAA:8 a=EUspDBNiAAAA:8 a=-FEiAWMsPlssRVfEe-4A:9 a=QEXdDO2ut3YA:10 a=IoWCM6iH3mJn3m4BftBB:22 a=TjNXssC_j7lpFel5tvFf:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTIwMDAyNSBTYWx0ZWRfXwItYITn3qL/2 ye0tXzN3FOSoFQG5Dn2/25TruxYC4HTMGN/IoYZJ8cwnjuE/dBlrM63AkK1PtSjPZQTdUROsi3Y v0b1PWRUMqTdlUR+Bcl3BuFiTT97U7E2xXBeQyUKS3G2Xvh5l4CH+kFi1CD/LpDdTB0pbmzB001 t6kZX8gRALchAFrkZcushyFtRA91g297nMevbCXodqJyYZNahJdVQIym6feUMde00F/1ibum/WP NZxk74denE0UxfTWGhtJ1tBoxY3DIe1YGxm7Q/Boa/7vk5X0ARPMmWvKlVZaT8OsVncE83HuPhK rjjY1IRX7cqJ35GDW+khTNvjF4hPfWDsXq72OVgiSxIMxNY3AJmE5SS+Qmx6IR9s/0Op5YKcTC4 ML5AlyoI X-Proofpoint-ORIG-GUID: nlzUoH0wsqF83JYDDPbQ0UnrjtOO7Eb3 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-24_07,2025-09-24_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 malwarescore=0 clxscore=1015 suspectscore=0 priorityscore=1501 impostorscore=0 spamscore=0 adultscore=0 bulkscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2507300000 definitions=main-2509200025 On 9/25/25 1:14 AM, Vikash Garodia wrote: > Some of vpu4 register defines are common with vpu3x. Move those into the > common register defines header. This is done to reuse the defines for > vpu4 in subsequent patch which enables the power sequence for vpu4. > > Co-developed-by: Vishnu Reddy > Signed-off-by: Vishnu Reddy > Signed-off-by: Vikash Garodia > --- > drivers/media/platform/qcom/iris/iris_vpu3x.c | 36 ---------------------- > drivers/media/platform/qcom/iris/iris_vpu_common.c | 23 -------------- > .../platform/qcom/iris/iris_vpu_register_defines.h | 29 +++++++++++++++++ This is a slippery slope. I think it's better if you explicitly say the header file contains the register map of VPU3 instead, as let's say VPU5 may add a random register in the middle (pushing some existing ones +0x4 down). Such changes are annoying to debug, and we've unfortunately been there on Adreno.. Because you're using this for a single common function that is both acting upon the same registers and performing the same operations on them across VPU35 and VPU4, it's okay to de-static-ize the function from iris_vpu3.c and refer to it from vpu4 ops, keeping the register map private to the former file which I think will end up less error-prone for the future. Konrad