Re: [PATCH v3 3/3] arm64: dts: qcom: msm8953: add MDSS

[Dmitry Baryshkov <dmitry.baryshkov@linaro.org>]

On 07/09/2022 18:30, Luca Weiss wrote:
> Hi Dmitry,
> 
> On Dienstag, 6. September 2022 21:41:11 CEST Dmitry Baryshkov wrote:
>> On Tue, 6 Sept 2022 at 21:36, Luca Weiss <luca@z3ntu.xyz> wrote:
>>> From: Vladimir Lypak <vladimir.lypak@gmail.com>
>>>
>>> Add the MDSS, MDP and DSI nodes that are found on msm8953 SoC.
>>>
>>> Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com>
>>> Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
>>> ---
>>> Changes since v2:
>>> - add "core" clock for mdss as suggested by Dmitry Baryshkov
>>>
>>>   arch/arm64/boot/dts/qcom/msm8953.dtsi | 210 ++++++++++++++++++++++++++
>>>   1 file changed, 210 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi
>>> b/arch/arm64/boot/dts/qcom/msm8953.dtsi index 3d11331e78d2..580333141a66
>>> 100644
>>> --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi
>>> @@ -726,6 +726,216 @@ tcsr_phy_clk_scheme_sel: syscon@193f044 {
>>>
>>>                          reg = <0x193f044 0x4>;
>>>                  
>>>                  };
>>>
>>> +               mdss: mdss@1a00000 {
>>> +                       compatible = "qcom,mdss";
>>> +
>>> +                       reg = <0x1a00000 0x1000>,
>>> +                             <0x1ab0000 0x1040>;
>>> +                       reg-names = "mdss_phys",
>>> +                                   "vbif_phys";
>>> +
>>> +                       power-domains = <&gcc MDSS_GDSC>;
>>> +                       interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
>>> +
>>> +                       interrupt-controller;
>>> +                       #interrupt-cells = <1>;
>>> +
>>> +                       clocks = <&gcc GCC_MDSS_AHB_CLK>,
>>> +                                <&gcc GCC_MDSS_AXI_CLK>,
>>> +                                <&gcc GCC_MDSS_VSYNC_CLK>,
>>> +                                <&gcc GCC_MDSS_MDP_CLK>;
>>> +                       clock-names = "iface",
>>> +                                     "bus",
>>> +                                     "vsync",
>>> +                                     "core";
>>> +
>>> +                       #address-cells = <1>;
>>> +                       #size-cells = <1>;
>>> +                       ranges;
>>> +
>>> +                       status = "disabled";
>>> +
>>> +                       mdp: mdp@1a01000 {
>>> +                               compatible = "qcom,mdp5";
>>
>> Could you please change this to "qcom,msm8953-mdp5", "qcom,mdp5".
> 
> This would be the first dtsi using the two compatibles then, correct? Are there
> any plans to adjust other SoCs?

Yes, this is a long-going plan. Having just "qcom,mdp5" doesn't allow 
switching between mdp5 and dpu1 drivers. Thus I'd ask to add per-SoC 
compat strings.

It's up to you (and Rob/Krzysztof) whether to leave just one compat 
string or have both of them: a per-soc one and a generic one.

> 
>>
>>> +                               reg = <0x1a01000 0x89000>;
>>> +                               reg-names = "mdp_phys";
>>> +
>>
>> [skipped]
>>
>>> +
>>> +                       dsi0_phy: dsi-phy@1a94400 {
>>
>> Let's probably use a generic name 'phy' here and for dsi1_phy.
> 
> Here also, the bindings examples all use dsi-phy@, are there any plans to
> change that and adjust other dtsi files?

Yes, sc7280 already uses phy@ for both DSI and eDP PHYs.

> 
>>
>> The rest looks good to me.
> 
> Thanks!
-- 
With best wishes
Dmitry