[PATCH v2] ARM: dts: renesas: r9a06g032-rzn1d400-db: use interrupt for Micrel PHYs

[PATCH v2] ARM: dts: renesas: r9a06g032-rzn1d400-db: use interrupt for Micrel PHYs

[Wolfram Sang]

Make use of the interrupts wired to the Micrel PHYs via the GPIO IRQ
mux.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Herve Codina <herve.codina@bootlin.com>
---
Changes since RFC v1:
* rebased to 7.0-rc2
* drop RFC status, irqmux is now upstream
* added tag from Herve (Thanks!)

 .../dts/renesas/r9a06g032-rzn1d400-db.dts     | 21 +++++++++++++++++++
 1 file changed, 21 insertions(+)

diff --git a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
index 80f78998500b..bf456130878e 100644
--- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
+++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
@@ -185,6 +185,18 @@ fixed-link {
 	};
 };
 
+&gpioirqmux {
+	interrupt-map = <89 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* pin 147: phy@4 */
+			<91 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; /* pin 149: phy@5 */
+	status = "okay";
+};
+
+&gpio2 {
+	pinctrl-0 = <&pins_gpio2>;
+	pinctrl-names = "default";
+	status = "okay";
+};
+
 &i2c2 {
 	pinctrl-0 = <&pins_i2c2>;
 	pinctrl-names = "default";
@@ -256,6 +268,13 @@ pins_cpld: pins-cpld {
 			 <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
 	};
 
+	pins_gpio2: pins-gpio2 {
+		pinmux = <RZN1_PINMUX(147, RZN1_FUNC_GPIO)>,
+			 <RZN1_PINMUX(149, RZN1_FUNC_GPIO)>;
+		drive-strength = <6>;
+		bias-disable;
+	};
+
 	pins_eth3: pins_eth3 {
 		pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
 			 <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
@@ -401,11 +420,13 @@ mdio {
 		switch0phy4: ethernet-phy@4 {
 			reg = <4>;
 			micrel,led-mode = <1>;
+			interrupts-extended = <&gpio2a 25 IRQ_TYPE_LEVEL_LOW>;
 		};
 
 		switch0phy5: ethernet-phy@5 {
 			reg = <5>;
 			micrel,led-mode = <1>;
+			interrupts-extended = <&gpio2a 27 IRQ_TYPE_LEVEL_LOW>;
 		};
 	};
 };
-- 
2.47.3

Re: [PATCH v2] ARM: dts: renesas: r9a06g032-rzn1d400-db: use interrupt for Micrel PHYs

[Geert Uytterhoeven]

Hi Wolfram,

On Thu, 5 Mar 2026 at 23:19, Wolfram Sang
<wsa+renesas@sang-engineering.com> wrote:
> Make use of the interrupts wired to the Micrel PHYs via the GPIO IRQ
> mux.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Reviewed-by: Herve Codina <herve.codina@bootlin.com>

Thanks for your patch!

> --- a/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> +++ b/arch/arm/boot/dts/renesas/r9a06g032-rzn1d400-db.dts
> @@ -256,6 +268,13 @@ pins_cpld: pins-cpld {
>                          <RZN1_PINMUX(122, RZN1_FUNC_USB)>;
>         };
>
> +       pins_gpio2: pins-gpio2 {

Please move this below, to preserve sort order (alphabetical,
and ignoring underscores that will be removed soon).

> +               pinmux = <RZN1_PINMUX(147, RZN1_FUNC_GPIO)>,
> +                        <RZN1_PINMUX(149, RZN1_FUNC_GPIO)>;
> +               drive-strength = <6>;
> +               bias-disable;

Shouldn't this be bias-pull-up, given the pull-up resistors R20 and
R78 on the interrupt lines are marked "not assembled" in the schematics?


> +       };
> +
>         pins_eth3: pins_eth3 {
>                 pinmux = <RZN1_PINMUX(36, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,
>                          <RZN1_PINMUX(37, RZN1_FUNC_CLK_ETH_MII_RGMII_RMII)>,

The rest LGTM, so with the above clarified:
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2] ARM: dts: renesas: r9a06g032-rzn1d400-db: use interrupt for Micrel PHYs

[Wolfram Sang]

Hi Geert,

> > +       pins_gpio2: pins-gpio2 {
> 
> Please move this below, to preserve sort order (alphabetical,
> and ignoring underscores that will be removed soon).

Will do.

> 
> > +               pinmux = <RZN1_PINMUX(147, RZN1_FUNC_GPIO)>,
> > +                        <RZN1_PINMUX(149, RZN1_FUNC_GPIO)>;
> > +               drive-strength = <6>;
> > +               bias-disable;
> 
> Shouldn't this be bias-pull-up, given the pull-up resistors R20 and
> R78 on the interrupt lines are marked "not assembled" in the schematics?

Ups, yes, "not assembled". Will update and test on HW tomorrow.

> The rest LGTM, so with the above clarified:
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Thanks,

   Wolfram