From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail.zeus03.de (zeus03.de [194.117.254.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 53D1A1A6829 for ; Wed, 11 Mar 2026 15:23:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=194.117.254.33 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773242613; cv=none; b=ti7nYzYteVZokPoDOuInvnHFc5XOejMswETnUW4mbwkpp0qGdjqisW1kRAkDnYdGLevP3Reyl4KlbnFo6usMTkHyQqHYVhkCEzEpQ7zHb+7pwXksWInw39e2War4OMS0ksICu1ItaMoaNYslnVDOk6kF7yHAueyi9ETC4w06fJ0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1773242613; c=relaxed/simple; bh=0k/rXyYOtlEMBBzf5uBtjj/zIzjRJkUsoOAFKy6wqYk=; h=Date:From:To:Cc:Subject:Message-ID:References:MIME-Version: Content-Type:Content-Disposition:In-Reply-To; b=BLY4A2nnX/JJGHTk2BIO7SDKlgoo+8EocFxslyBPJVjnN72ymGTfk5xHHxoFdhTPHi14/45DT4sKTC8pKRFPiOkVL0T5h4bZTwCZHcRIZFUxv4nyLFcbUWXZrYKmzkDmzdyR6tWwjP/viCpTqKI/OY4+rOdLM7Ad1W49k8f+Jaw= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com; spf=pass smtp.mailfrom=sang-engineering.com; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b=BF4Er0Mt; arc=none smtp.client-ip=194.117.254.33 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sang-engineering.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sang-engineering.com header.i=@sang-engineering.com header.b="BF4Er0Mt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= sang-engineering.com; h=date:from:to:cc:subject:message-id :references:mime-version:content-type:in-reply-to; s=k1; bh=2J3Q X9QvAn/3GL6JClSvGzAVr7s88UXGSibUv2h/1rk=; b=BF4Er0MtPNlpDXlDqUvR r2Q6lUeGfADOzNZc7dQSjG5xH4nj/VIHTpxavmaJDIFTgMPmx260d8uVmuJe0/SO zKbRpFd2l6c4oyqXOR9yIpgj12CxZCGK2/ry7BDu25OQxNniVB9Q2tpmWzYwA+1a IVv1574J/6n+dgJ6Df3tn8yQFD7hYV+qMeKYXciR4Qomdy0EgFKfSPUkOlH1iSZi 3REayAg8GjdQyv6pCQMmhwJQGzSpvjJ4hinoucx7R0DduAfwAwdCpmGI+87qjS1V Mdk/UBj8cYyVp5CgLEwZuRKxawDDUIlV3n+iDwBNC+VR/JdJ7TAbnm/ZDKcSDdYp vg== Received: (qmail 3705871 invoked from network); 11 Mar 2026 16:23:27 +0100 Received: by mail.zeus03.de with ESMTPSA (TLS_AES_256_GCM_SHA384 encrypted, authenticated); 11 Mar 2026 16:23:27 +0100 X-UD-Smtp-Session: l3s3148p1@GqqtN8FMbfpUvUmE Date: Wed, 11 Mar 2026 16:23:26 +0100 From: Wolfram Sang To: Geert Uytterhoeven Cc: linux-renesas-soc@vger.kernel.org, Herve Codina , Geert Uytterhoeven , Magnus Damm , Rob Herring , Krzysztof Kozlowski , Conor Dooley , devicetree@vger.kernel.org Subject: Re: [PATCH v2] ARM: dts: renesas: r9a06g032-rzn1d400-db: use interrupt for Micrel PHYs Message-ID: References: <20260305221939.32643-2-wsa+renesas@sang-engineering.com> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: Hi Geert, > > + pins_gpio2: pins-gpio2 { > > Please move this below, to preserve sort order (alphabetical, > and ignoring underscores that will be removed soon). Will do. > > > + pinmux = , > > + ; > > + drive-strength = <6>; > > + bias-disable; > > Shouldn't this be bias-pull-up, given the pull-up resistors R20 and > R78 on the interrupt lines are marked "not assembled" in the schematics? Ups, yes, "not assembled". Will update and test on HW tomorrow. > The rest LGTM, so with the above clarified: > Reviewed-by: Geert Uytterhoeven Thanks, Wolfram