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From: Andy Shevchenko <andriy.shevchenko@intel.com>
To: radu.sabau@analog.com
Cc: "Lars-Peter Clausen" <lars@metafoo.de>,
	"Michael Hennerich" <Michael.Hennerich@analog.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"David Lechner" <dlechner@baylibre.com>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Uwe Kleine-König" <ukleinek@kernel.org>,
	"Liam Girdwood" <lgirdwood@gmail.com>,
	"Mark Brown" <broonie@kernel.org>,
	"Linus Walleij" <linusw@kernel.org>,
	"Bartosz Golaszewski" <brgl@kernel.org>,
	"Philipp Zabel" <p.zabel@pengutronix.de>,
	linux-iio@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,
	linux-gpio@vger.kernel.org
Subject: Re: [PATCH v3 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family
Date: Fri, 13 Mar 2026 13:14:41 +0200	[thread overview]
Message-ID: <abPxocHDvBt3rIVL@ashevche-desk.local> (raw)
In-Reply-To: <20260313-ad4692-multichannel-sar-adc-driver-v3-0-b4d14d81a181@analog.com>

On Fri, Mar 13, 2026 at 12:07:24PM +0200, Radu Sabau via B4 Relay wrote:
> This series adds support for the Analog Devices AD4691 family of
> high-speed, low-power multichannel successive approximation register
> (SAR) ADCs with an SPI-compatible serial interface.
> 
> The family includes:
>   - AD4691: 16-channel, 500 kSPS
>   - AD4692: 16-channel, 1 MSPS
>   - AD4693: 8-channel, 500 kSPS
>   - AD4694: 8-channel, 1 MSPS
> 
> The devices support two operating modes, auto-detected from the device
> tree:
>   - CNV Clock Mode: external PWM drives CNV independently of SPI;
>                     DATA_READY on GP0 signals end of conversion
>   - Manual Mode: CNV tied to SPI CS; each SPI transfer reads
>                  the previous conversion result and starts the
>                  next (pipelined N+1 scheme)
> 
> A new driver is warranted rather than extending ad4695: the AD4691
> data path uses an accumulator-register model — results are read from
> AVG_IN registers, with ACC_MASK, ADC_SETUP, DEVICE_SETUP, and
> GPIO_MODE registers controlling the sequencer — none of which exist
> in AD4695. CNV Clock Mode (PWM drives CNV independently of SPI) and
> Manual Mode (pipelined N+1 transfers) also have no equivalent in
> AD4695's command-embedded single-cycle protocol.
> 
> The series is structured as follows:
>   1/4 - DT bindings (YAML schema + dt-bindings header) and
>         MAINTAINERS entry
>   2/4 - Initial driver: register map via custom regmap callbacks,
>         IIO read_raw/write_raw, both operating modes, single-channel
>           reads via internal oscillator (Autonomous Mode)
>   3/4 - Triggered buffer support: IRQ-driven (DATA_READY on GP0) for
>         CNV Clock Mode; hrtimer-based trigger for Manual Mode to
>         handle the pipelined N+1 SPI protocol
>   4/4 - SPI Engine offload support: DMA-backed high-throughput
>         capture path using the SPI offload subsystem

I stopped review where I stopped because I have a feeling that you ignored some
of my comments from the previous version. Why? What's going on?

-- 
With Best Regards,
Andy Shevchenko



      parent reply	other threads:[~2026-03-13 11:14 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-13 10:07 [PATCH v3 0/4] iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family Radu Sabau via B4 Relay
2026-03-13 10:07 ` [PATCH v3 1/4] dt-bindings: iio: adc: add bindings for AD4691 family Radu Sabau via B4 Relay
2026-03-14  9:41   ` Krzysztof Kozlowski
2026-03-16 11:55     ` Sabau, Radu bogdan
2026-03-14 15:29   ` David Lechner
2026-03-14 16:19     ` David Lechner
2026-03-16 12:39     ` Sabau, Radu bogdan
2026-03-16 12:55       ` Sabau, Radu bogdan
2026-03-16 15:14       ` David Lechner
2026-03-16 15:47         ` Sabau, Radu bogdan
2026-03-14 18:18   ` David Lechner
2026-03-13 10:07 ` [PATCH v3 2/4] iio: adc: ad4691: add initial driver " Radu Sabau via B4 Relay
2026-03-13 10:58   ` Andy Shevchenko
2026-03-16 15:29     ` Sabau, Radu bogdan
2026-03-16 15:51       ` David Lechner
2026-03-16 15:57         ` Sabau, Radu bogdan
2026-03-16 16:13           ` Andy Shevchenko
2026-03-14 11:04   ` Nuno Sá
2026-03-16 14:29     ` Sabau, Radu bogdan
2026-03-16 16:00     ` Sabau, Radu bogdan
2026-03-14 16:36   ` David Lechner
2026-03-16 13:01     ` Sabau, Radu bogdan
2026-03-25 15:01   ` kernel test robot
2026-03-13 10:07 ` [PATCH v3 3/4] iio: adc: ad4691: add triggered buffer support Radu Sabau via B4 Relay
2026-03-13 11:13   ` Andy Shevchenko
2026-03-13 12:09     ` Sabau, Radu bogdan
2026-03-13 14:40       ` Andy Shevchenko
2026-03-14 18:37   ` David Lechner
2026-03-16 13:22     ` Sabau, Radu bogdan
2026-03-16 15:37       ` David Lechner
2026-03-16 15:56         ` Sabau, Radu bogdan
2026-03-16 16:44           ` David Lechner
2026-03-17  9:27             ` Sabau, Radu bogdan
2026-03-13 10:07 ` [PATCH v3 4/4] iio: adc: ad4691: add SPI offload support Radu Sabau via B4 Relay
2026-03-14 19:37   ` David Lechner
2026-03-16 13:31     ` Sabau, Radu bogdan
2026-03-13 11:14 ` Andy Shevchenko [this message]

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